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NitsirksNitsirks
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Merge branch 'main' into user/dev/michnorris/kv_bugfix
2 parents 398ecc8 + 4c961c1 commit b97f51a

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‎.github/workflow_metadata/pr_hash‎

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9f509918a32aef8928aa0d046adc9000cc660627986d7977e6e72b0fe2ca57f852d96f6a980044075796b22e1fb3a665

‎.github/workflow_metadata/pr_timestamp‎

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‎src/abr_top/uvmf/config/compile.yml‎

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@@ -60,3 +60,193 @@ global:
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# Report "MVC_ERROR" as "UVM_ERROR"
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- '+QVIP_UVM_REPORTING'
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- '+UVM_VERBOSITY=UVM_LOW' # Adding UVM verbosity level here
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---
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provides: [uvmf_mldsa_sram2clk_nomasking]
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schema_version: 2.4.0
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requires:
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- mldsa_uvmf_lib
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- abr_top
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- abr_uvm_pkg
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- abr_coverage
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targets:
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tb:
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directories:
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- ${COMPILE_ROOT}
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- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg
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- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/registers
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- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/parameters
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- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/sequences
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- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/tests
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- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench
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files:
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- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/registers/mldsa_reg_model_top_pkg.sv
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- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/mldsa_env_pkg.sv
84+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/parameters/mldsa_parameters_pkg.sv
85+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/sequences/mldsa_sequences_pkg.sv
86+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/tests/mldsa_tests_pkg.sv
87+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench/hdl_top.sv
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- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench/hvl_top.sv
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tops:
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- hdl_top
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- hvl_top
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sim:
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pre_exec: 'echo "[PRE-EXEC] Copying C executable vector generator to $PWD"
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&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5 .
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&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5_strm_msg .
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&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5_strm_msg_debug .
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&& cp -r $MSFT_SCRIPTS_DIR/models/ml-kem .
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&& mkdir ml-kem/tv'
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global:
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tool:
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vcs:
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default:
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- '-assert svaext'
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- +define+ABR_ASSERT_ON
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- '+define+ABR_MASKING_DISABLED'
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- '+define+ABR_SRAM_2CLK_LATENCY'
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- '-noinherit_timescale=1ns/1ps'
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# Suppress a warning due to calling $fgets as task instead of function
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# i.e. discarding the return value. This is in auto-generated code.
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- '+warn=noRVOSFD'
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# Suppress NOTE about repeated package imports within the same
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# package (each .svh file included in the auto-generated UVM _pkg.sv
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# files imports the same dependencies)
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- '-suppress=SV-LCM-PPWI'
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elab:
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# Suppress warnings about too few port connections - auto-generated interfaces
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# declare all signals as inout, but are driven at a lower layer than the
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# instantiation, so they will always flag this
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- '-suppress=TFIPC'
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sim:
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- '-sv_root $QUESTA_MVC_HOME/questa_mvc_core/linux_x86_64_gcc-6.2.0_vcs'
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- '-sv_lib libahb_IN_SystemVerilog_VCS_full'
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- '-sv_lib libapb3_IN_SystemVerilog_VCS_full'
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# Report "MVC_ERROR" as "UVM_ERROR"
125+
- '+QVIP_UVM_REPORTING'
126+
- '+UVM_VERBOSITY=UVM_LOW' # Adding UVM verbosity level here
127+
---
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provides: [uvmf_mldsa_sram1clk_nomasking]
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schema_version: 2.4.0
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requires:
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- mldsa_uvmf_lib
132+
- abr_top
133+
- abr_uvm_pkg
134+
- abr_coverage
135+
targets:
136+
tb:
137+
directories:
138+
- ${COMPILE_ROOT}
139+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg
140+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/registers
141+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/parameters
142+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/sequences
143+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/tests
144+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench
145+
files:
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- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/registers/mldsa_reg_model_top_pkg.sv
147+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/mldsa_env_pkg.sv
148+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/parameters/mldsa_parameters_pkg.sv
149+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/sequences/mldsa_sequences_pkg.sv
150+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/tests/mldsa_tests_pkg.sv
151+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench/hdl_top.sv
152+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench/hvl_top.sv
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tops:
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- hdl_top
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- hvl_top
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sim:
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pre_exec: 'echo "[PRE-EXEC] Copying C executable vector generator to $PWD"
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&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5 .
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&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5_strm_msg .
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&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5_strm_msg_debug .
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&& cp -r $MSFT_SCRIPTS_DIR/models/ml-kem .
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&& mkdir ml-kem/tv'
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global:
164+
tool:
165+
vcs:
166+
default:
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- '-assert svaext'
168+
- +define+ABR_ASSERT_ON
169+
- '+define+ABR_MASKING_DISABLED'
170+
- '-noinherit_timescale=1ns/1ps'
171+
# Suppress a warning due to calling $fgets as task instead of function
172+
# i.e. discarding the return value. This is in auto-generated code.
173+
- '+warn=noRVOSFD'
174+
# Suppress NOTE about repeated package imports within the same
175+
# package (each .svh file included in the auto-generated UVM _pkg.sv
176+
# files imports the same dependencies)
177+
- '-suppress=SV-LCM-PPWI'
178+
elab:
179+
# Suppress warnings about too few port connections - auto-generated interfaces
180+
# declare all signals as inout, but are driven at a lower layer than the
181+
# instantiation, so they will always flag this
182+
- '-suppress=TFIPC'
183+
sim:
184+
- '-sv_root $QUESTA_MVC_HOME/questa_mvc_core/linux_x86_64_gcc-6.2.0_vcs'
185+
- '-sv_lib libahb_IN_SystemVerilog_VCS_full'
186+
- '-sv_lib libapb3_IN_SystemVerilog_VCS_full'
187+
# Report "MVC_ERROR" as "UVM_ERROR"
188+
- '+QVIP_UVM_REPORTING'
189+
- '+UVM_VERBOSITY=UVM_LOW' # Adding UVM verbosity level here
190+
---
191+
provides: [uvmf_mldsa_sram2clk]
192+
schema_version: 2.4.0
193+
requires:
194+
- mldsa_uvmf_lib
195+
- abr_top
196+
- abr_uvm_pkg
197+
- abr_coverage
198+
targets:
199+
tb:
200+
directories:
201+
- ${COMPILE_ROOT}
202+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg
203+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/registers
204+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/parameters
205+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/sequences
206+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/tests
207+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench
208+
files:
209+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/registers/mldsa_reg_model_top_pkg.sv
210+
- ${COMPILE_ROOT}/uvmf_template_output/verification_ip/environment_packages/mldsa_env_pkg/mldsa_env_pkg.sv
211+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/parameters/mldsa_parameters_pkg.sv
212+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/sequences/mldsa_sequences_pkg.sv
213+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/tests/mldsa_tests_pkg.sv
214+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench/hdl_top.sv
215+
- ${COMPILE_ROOT}/uvmf_template_output/project_benches/mldsa/tb/testbench/hvl_top.sv
216+
tops:
217+
- hdl_top
218+
- hvl_top
219+
sim:
220+
pre_exec: 'echo "[PRE-EXEC] Copying C executable vector generator to $PWD"
221+
&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5 .
222+
&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5_strm_msg .
223+
&& cp $COMPILE_ROOT/Dilithium_ref/dilithium/ref/test/test_dilithium5_strm_msg_debug .
224+
&& cp -r $MSFT_SCRIPTS_DIR/models/ml-kem .
225+
&& mkdir ml-kem/tv'
226+
global:
227+
tool:
228+
vcs:
229+
default:
230+
- '-assert svaext'
231+
- +define+ABR_ASSERT_ON
232+
- '+define+ABR_SRAM_2CLK_LATENCY'
233+
- '-noinherit_timescale=1ns/1ps'
234+
# Suppress a warning due to calling $fgets as task instead of function
235+
# i.e. discarding the return value. This is in auto-generated code.
236+
- '+warn=noRVOSFD'
237+
# Suppress NOTE about repeated package imports within the same
238+
# package (each .svh file included in the auto-generated UVM _pkg.sv
239+
# files imports the same dependencies)
240+
- '-suppress=SV-LCM-PPWI'
241+
elab:
242+
# Suppress warnings about too few port connections - auto-generated interfaces
243+
# declare all signals as inout, but are driven at a lower layer than the
244+
# instantiation, so they will always flag this
245+
- '-suppress=TFIPC'
246+
sim:
247+
- '-sv_root $QUESTA_MVC_HOME/questa_mvc_core/linux_x86_64_gcc-6.2.0_vcs'
248+
- '-sv_lib libahb_IN_SystemVerilog_VCS_full'
249+
- '-sv_lib libapb3_IN_SystemVerilog_VCS_full'
250+
# Report "MVC_ERROR" as "UVM_ERROR"
251+
- '+QVIP_UVM_REPORTING'
252+
- '+UVM_VERBOSITY=UVM_LOW' # Adding UVM verbosity level here

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