Skip to content
Nightly Release

Nightly Release 2.x #630

Sign in to view logs

Nightly Release 2.x

Nightly Release 2.x #630

Run time

Learn about OS pricing on GitHub Actions
Job Run time
Find Latest Release
27s
FPGA Suite (1.1, itrng, log) / check_cache
15s
FPGA Suite (1.0, etrng, log) / check_cache
13s
FPGA Suite (1.1, itrng, log) / build_test_binaries
5m 17s
FPGA Suite (1.0, etrng, nolog) / check_cache
18s
FPGA Suite (1.0, etrng, nolog) / build_test_binaries
5m 18s
FPGA Suite (1.0, etrng, log) / build_test_binaries
5m 12s
FPGA Suite (1.0, itrng, log) / check_cache
22s
FPGA Suite (1.0, itrng, nolog) / check_cache
21s
FPGA Suite (1.0, itrng, log) / build_test_binaries
5m 25s
FPGA Suite (1.0, itrng, nolog) / build_test_binaries
5m 11s
FPGA Suite (1.1, etrng, log) / check_cache
15s
FPGA Suite (1.1, etrng, nolog) / check_cache
13s
FPGA Suite (1.1, etrng, log) / build_test_binaries
8m 3s
FPGA Suite (1.1, etrng, nolog) / build_test_binaries
5m 24s
FPGA Suite (hw-latest, itrng, log) / check_cache
15s
FPGA Suite (hw-latest, itrng, log) / build_test_binaries
5m 57s
sw-emulator Suite (etrng, log) / build_and_test
21m 34s
sw-emulator Suite (itrng, log) / build_and_test
21m 21s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 38s
sw-emulator Suite (etrng, nolog) / build_and_test
21m 25s
sw-emulator Suite (itrng, log) / build_and_test
21m 11s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 36s
FPGA Suite (hw-latest, etrng, log) / check_cache
14s
sw-emulator Suite (itrng, log) / build_and_test
20m 57s
sw-emulator Suite (itrng, nolog) / build_and_test
21m 16s
FPGA Suite (hw-latest, etrng, log) / build_test_binaries
5m 41s
sw-emulator Suite (etrng, log) / build_and_test
21m 38s
sw-emulator Suite (etrng, log) / build_and_test
21m 5s
FPGA Suite (1.1, itrng, nolog) / build_test_binaries
6m 32s
FPGA Suite (1.1, itrng, nolog) / check_cache
21s
FPGA Suite (hw-latest, etrng, nolog) / check_cache
13s
FPGA Suite (hw-latest, itrng, nolog) / check_cache
13s
sw-emulator Suite (itrng, nolog) / build_and_test
20m 42s
FPGA Suite (hw-latest, etrng, nolog) / build_test_binaries
7m 29s
sw-emulator Suite (etrng, nolog) / build_and_test
20m 36s
FPGA Suite (hw-latest, itrng, nolog) / build_test_binaries
5m 37s
FPGA Suite (1.0, etrng, log) / build_bitstream
-1s
FPGA Suite (1.0, etrng, log) / build_kernel_modules
-1s
FPGA Suite (1.1, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, nolog) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (hw-latest, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, etrng, log) / build_bitstream
0s
FPGA Suite (1.1, etrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, etrng, log) / build_kernel_modules
0s
FPGA Suite (hw-latest, etrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, etrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, log) / build_bitstream
0s
FPGA Suite (1.1, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (hw-latest, itrng, log) / build_bitstream
0s
FPGA Suite (hw-latest, itrng, log) / build_kernel_modules
-1s
FPGA Suite (hw-latest, itrng, log) / cache_fpga_bitstream_artifact
-1s
FPGA Suite (1.0, etrng, nolog) / build_kernel_modules
-1s
FPGA Suite (1.0, etrng, nolog) / build_bitstream
-1s
FPGA Suite (1.0, etrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.1, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.1, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, log) / build_kernel_modules
0s
FPGA Suite (1.0, itrng, nolog) / build_bitstream
0s
FPGA Suite (1.0, itrng, log) / build_bitstream
0s
FPGA Suite (1.0, itrng, log) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / cache_fpga_bitstream_artifact
0s
FPGA Suite (1.0, itrng, nolog) / build_kernel_modules
0s
FPGA Suite (1.1, itrng, log) / test_artifacts
1s
FPGA Suite (1.0, itrng, nolog) / test_artifacts
1s
FPGA Suite (1.0, etrng, log) / test_artifacts
1s
FPGA Suite (1.0, etrng, nolog) / test_artifacts
1s
FPGA Suite (1.1, etrng, nolog) / test_artifacts
1s
FPGA Suite (1.0, itrng, log) / test_artifacts
1d 0h 0m 0s
FPGA Suite (hw-latest, itrng, nolog) / test_artifacts
1d 0h 0m 0s
FPGA Suite (hw-latest, etrng, log) / test_artifacts
1d 0h 0m 0s
FPGA Suite (hw-latest, itrng, log) / test_artifacts
1s
FPGA Suite (1.1, itrng, nolog) / test_artifacts
1s
FPGA Suite (hw-latest, etrng, nolog) / test_artifacts
1d 0h 0m 0s
FPGA Suite (1.1, etrng, log) / test_artifacts
1s
Create New Release
0s
Publish https://caliptra-sw.github.io/
0s
4d 5h 27m 47s