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Nightly Release 2.x Nightly Release 2.x #965: Manually run by zhalvorsen
4h 27m 57s main
main
4h 27m 57s
Address test_generate_csr_envelop_stress timeouts Publish merged PRs on Slack #1897: Pull request #3880 closed by zhalvorsen
7s
7s
Workaround in test_generate_csr_envelop_stress for issue with DOT on … Policy #10085: Commit 4312e42 pushed by github-merge-queue Bot
3m 42s main
main
3m 42s
Workaround in test_generate_csr_envelop_stress for issue with DOT on … Size History #13023: Commit 4312e42 pushed by github-merge-queue Bot
5m 26s main
main
5m 26s
Workaround in test_generate_csr_envelop_stress for issue with DOT on … Code Coverage #2738: Commit 4312e42 pushed by github-merge-queue Bot
38m 34s main
main
38m 34s
Workaround in test_generate_csr_envelop_stress for issue with DOT on … Build and Test #15003: Commit 4312e42 pushed by github-merge-queue Bot
53m 3s main
main
53m 3s
Workaround in test_generate_csr_envelop_stress for issue with DOT on … Verilator Hardware Model #14897: Commit 4312e42 pushed by github-merge-queue Bot
58m 14s main
main
58m 14s
FPGA Build FPGA Build #9155: Merge group checks requested
36m 46s
36m 46s
Build and Test Build and Test #15002: Merge group checks requested
48m 39s
48m 39s
Size History Size History #13022: Merge group checks requested
5m 23s
5m 23s
Policy Policy #10084: Merge group checks requested
3m 46s
3m 46s
Verilator Hardware Model Verilator Hardware Model #14896: Merge group checks requested
58m 35s
58m 35s
Subsystem FPGA Build Subsystem FPGA Build #3989: Merge group checks requested
1h 1m 0s
1h 1m 0s
Fuzz Testing Nightly Fuzz Testing Nightly #857: Scheduled
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2m 7s
Nightly Release Nightly Release #156: Scheduled
3h 23m 16s main
main
3h 23m 16s
Nightly Release 2.x Nightly Release 2.x #964: Scheduled
4h 29m 23s main
main
4h 29m 23s
Verilator Nightly Verilator Nightly #518: Scheduled
1m 11s main
main
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Address test_generate_csr_envelop_stress timeouts Code Coverage #2737: Pull request #3880 opened by nquarton
39m 56s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
39m 56s
Address test_generate_csr_envelop_stress timeouts Build and Test #15001: Pull request #3880 opened by nquarton
52m 13s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
52m 13s
Address test_generate_csr_envelop_stress timeouts FPGA Build #9154: Pull request #3880 opened by nquarton
37m 47s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
37m 47s
Address test_generate_csr_envelop_stress timeouts Verilator Hardware Model #14895: Pull request #3880 opened by nquarton
1h 18m 40s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
1h 18m 40s
Address test_generate_csr_envelop_stress timeouts Subsystem FPGA Build #3988: Pull request #3880 opened by nquarton
1h 44m 20s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
1h 44m 20s
Address test_generate_csr_envelop_stress timeouts Policy #10083: Pull request #3880 opened by nquarton
3m 40s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
3m 40s
Address test_generate_csr_envelop_stress timeouts Size History #13021: Pull request #3880 opened by nquarton
5m 35s nquarton:csr_stress_test_ss_fpga_workaround
nquarton:csr_stress_test_ss_fpga_workaround
5m 35s
Port DPE dependency bump to caliptra-2.0 Subsystem FPGA Build #3987: Pull request #3830 synchronize by parvathib
2h 25m 58s parvathib:dpe-2.0-bump-up
parvathib:dpe-2.0-bump-up
2h 25m 58s