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Use README.rst instead of README.md
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Signed-off-by: Daniel Lim Wee Soong <[email protected]>
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daniellimws committed Apr 19, 2020
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106 changes: 0 additions & 106 deletions README.md

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123 changes: 123 additions & 0 deletions README.rst
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SymbiFlow Verilog to VtR XML (v2x)
===================================


.. image:: https://readthedocs.org/projects/python-symbiflow-v2x/badge/?version=latest
:target: https://python-symbiflow-v2x.readthedocs.io/en/latest/?badge=latest
:alt: Documentation Status

.. image:: https://travis-ci.com/SymbiFlow/python-symbiflow-v2x.svg?branch=master
:target: https://travis-ci.com/SymbiFlow/python-symbiflow-v2x
:alt: Build Status


v2x is a tool for converting specialized annotated Verilog models into XML needed for
`Verilog to Routing flow <https://docs.verilogtorouting.org/en/latest/arch/reference/>`_.

Documentation can be found at `https://python-symbiflow-v2x.readthedocs.io/en/latest/ <https://python-symbiflow-v2x.readthedocs.io/en/latest/examples.html>`_.

Installation
------------

v2x can be installed from a local git repository using pip.

.. code-block::
cd python-symbiflow-v2x
pip install .
Alternatively, it can be installed from GitHub directly.

.. code-block::
pip install git+https://github.com/SymbiFlow/python-symbiflow-v2x.git#egg=python-symbiflow-v2x
Usage
-----

After installing v2x, you can run ``python -m v2x`` to use it.

.. code-block::
python -m v2x -h
usage: __main__.py [-h] [--top TOP] [--outfile OUTFILE] [--includes INCLUDES]
[--mode {pb_type,model}]
input.v [input.v ...]
Verilog to XML
positional arguments:
input.v One or more Verilog input files, that will be passed
to Yosys internally. They should be enough to generate
a flattened representation of the model, so that paths
through the model can be determined.
optional arguments:
-h, --help show this help message and exit
--top TOP Top level module, will usually be automatically
determined from the file name im.v
--outfile OUTFILE, -o OUTFILE
Output filename, default 'output.xml'
--includes INCLUDES Comma separate list of include directories.
--mode {pb_type,model}
Output file type, possible values are: pb_type and
model. Default value is pb_type
For example, to generate a pb_type xml file from adder.v, run

.. code-block::
python -m v2x -o adder.pb_type.xml adder.v
Or, to generate a model xml file, run

.. code-block::
python -m v2x --mode model -o adder.model.xml adder.v
v2x expects the module name to be the same as the file name. If it is different, make sure to specifiy it with the ``--top`` argument.

.. code-block::
python -m v2x --top BLOCK -o adder.pb_type.xml adder.v
Tests
-----

The test cases are stored in tests/, and pytest can be used to run them.

.. code-block::
rm -rf build # run this step so that pytest uses the latest files for the tests
pytest -vv
If you are making changes to any python code, make sure that they follow the PEP8 style guide by running flake8.

.. code-block::
flake8 tests
flake8 v2x
Documentation
-------------

We use sphinx for our documentation and the files are stored in docs/. To host it locally (if you are planning to update it), you can use the Makefile inside.

First, run ``make env`` to prepare a Conda environment that contains the necessary packages to build and host the documentation site. After that, simply run ``make livehtml`` which starts a local server running at port 8000 with the documentation site.

.. code-block::
cd docs
make env
make livehtml
Talks
-----

**VPR device models generation from Verilog with V2X - Karol Gugala - ORConf 2019**


.. image:: https://img.youtube.com/vi/a31vH_tZLBM/0.jpg
:target: https://www.youtube.com/watch?v=a31vH_tZLBM
:alt: v2x orconf talk

6 changes: 4 additions & 2 deletions docs/conf.py
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'sphinx.ext.todo',
'sphinx_markdown_tables',
'symbolator_sphinx',
'sphinxcontrib_verilog_diagrams',
'm2r'
'sphinxcontrib_verilog_diagrams'
]

# Add any paths that contain templates here, relative to this directory.
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# The suffix(es) of source filenames.
# You can specify multiple suffix as a list of string:
source_suffix = ['.rst', '.md']
source_parsers = {
'.md': 'markdown_code_symlinks.LinkParser',
}

# The master toctree document.
master_doc = 'index'
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2 changes: 1 addition & 1 deletion docs/index.rst
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.. mdinclude:: ../README.md
.. include:: ../README.rst

.. toctree::
introduction.rst
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1 change: 0 additions & 1 deletion docs/requirements.txt
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Expand Up @@ -14,7 +14,6 @@ git+https://github.com/SymbiFlow/sphinxcontrib-markdown-symlinks.git#egg=markdow

# Verilog diagrams using Yosys + netlistsvg
git+https://github.com/SymbiFlow/sphinxcontrib-verilog-diagrams.git#egg=sphinxcontrib-verilog-diagrams
git+https://github.com/daniellimws/m2r.git#egg=m2r

# Module diagrams
symbolator
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2 changes: 1 addition & 1 deletion setup.py
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import setuptools

with open("README.md", "r") as fh:
with open("README.rst", "r") as fh:
long_description = fh.read()

setuptools.setup(
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