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koblonczekwkkuna
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Fix isa and mabi argument handling
When no target (and neither custom target) was specified, it defaulted to rv32imc which overrode any isa and mabi supplied as arguments. This prevented setting any custom isa and mabi from the command line. New behavior is to only override these if they aren't set by the user explicitly (values specified with --isa and --mabi options override --target). Signed-off-by: Krzysztof Obłonczek <[email protected]>
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run.py

+30-24
Original file line numberDiff line numberDiff line change
@@ -949,44 +949,50 @@ def load_config(args, cwd):
949949
args.core_setting_dir = cwd + "/pygen/pygen_src/target/" + args.target
950950
else:
951951
args.core_setting_dir = cwd + "/target/" + args.target
952+
952953
if args.target == "rv32imc":
953-
args.mabi = "ilp32"
954-
args.isa = "rv32imc_zicsr_zifencei"
954+
mabi = "ilp32"
955+
isa = "rv32imc_zicsr_zifencei"
955956
elif args.target == "rv32imafdc":
956-
args.mabi = "ilp32"
957-
args.isa = "rv32imafdc_zicsr_zifencei"
957+
mabi = "ilp32"
958+
isa = "rv32imafdc_zicsr_zifencei"
958959
elif args.target == "rv32imc_sv32":
959-
args.mabi = "ilp32"
960-
args.isa = "rv32imc_zicsr_zifencei"
960+
mabi = "ilp32"
961+
isa = "rv32imc_zicsr_zifencei"
961962
elif args.target == "multi_harts":
962-
args.mabi = "ilp32"
963-
args.isa = "rv32gc_zicsr_zifencei"
963+
mabi = "ilp32"
964+
isa = "rv32gc_zicsr_zifencei"
964965
elif args.target == "rv32imcb":
965-
args.mabi = "ilp32"
966-
args.isa = "rv32imcb_zicsr_zifencei"
966+
mabi = "ilp32"
967+
isa = "rv32imcb_zicsr_zifencei"
967968
elif args.target == "rv32i":
968-
args.mabi = "ilp32"
969-
args.isa = "rv32i_zicsr_zifencei"
969+
mabi = "ilp32"
970+
isa = "rv32i_zicsr_zifencei"
970971
elif args.target == "rv64imc":
971-
args.mabi = "lp64"
972-
args.isa = "rv64imc_zicsr_zifencei"
972+
mabi = "lp64"
973+
isa = "rv64imc_zicsr_zifencei"
973974
elif args.target == "rv64imcb":
974-
args.mabi = "lp64"
975-
args.isa = "rv64imcb_zicsr_zifencei"
975+
mabi = "lp64"
976+
isa = "rv64imcb_zicsr_zifencei"
976977
elif args.target == "rv64gc":
977-
args.mabi = "lp64"
978-
args.isa = "rv64gc_zicsr_zifencei"
978+
mabi = "lp64"
979+
isa = "rv64gc_zicsr_zifencei"
979980
elif args.target == "rv64gcv":
980-
args.mabi = "lp64"
981-
args.isa = "rv64gcv_zicsr_zifencei"
981+
mabi = "lp64"
982+
isa = "rv64gcv_zicsr_zifencei"
982983
elif args.target == "ml":
983-
args.mabi = "lp64"
984-
args.isa = "rv64imc_zicsr_zifencei"
984+
mabi = "lp64"
985+
isa = "rv64imc_zicsr_zifencei"
985986
elif args.target == "rv64imafdc":
986-
args.mabi = "lp64"
987-
args.isa = "rv64imafdc_zicsr_zifencei"
987+
mabi = "lp64"
988+
isa = "rv64imafdc_zicsr_zifencei"
988989
else:
989990
sys.exit("Unsupported pre-defined target: {}".format(args.target))
991+
992+
if not args.mabi:
993+
args.mabi = mabi
994+
if not args.isa:
995+
args.isa = isa
990996
else:
991997
if re.match(".*gcc_compile.*", args.steps) or re.match(".*iss_sim.*",
992998
args.steps):

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