Potential issue with test case for indexed-unordered segment stores due to variance in storage order #61
Description
Description:
When testing the vsuxseg2ei16 instruction, the test case fails under specific conditions. Upon further analysis, it was found that address overlap in the test cases, according to the RISC-V spec description for vsuxseg2ei16,
When the data in v5 has a sequence of difference 2, for example, v5={2,4,... }, the addresses of v3[0] and v2[1] overlap. There exists a scenario where v2[1] can overwrite the value stored by v3[0].
Since the instruction is Indexed-unordered segment stores, when address overlap occurs, the addressable data is theoretically unpredictable
Based on the results of my tests and my personal understanding, I think the test of Indexed-unordered segment stores directive may need further improvement.