Pgtable: expose map_xx_with_parent_flags to add flexibility for other systems && enforce dirty bit in default parent flags#1100
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Create the paging crate and move foundational types from the kernel: - address.rs (PhysAddr, VirtAddr, Address trait), remove unused VirtPhysPair which was introduced 2 years ago and is no longer used by svsm code. - sizes.rs (PAGE_SIZE, PAGE_SHIFT, size constants) - util.rs (align_up, align_down, page_align_up, overlap, bit_mask) - Associated verus spec/proof files for verification - paging: move Verus specs and proofs into dedicated dirs - gate proofs and spec with verus_only The kernel re-exports these types to maintain API compatibility. Unit tests for utility functions move to paging/src/util.rs. Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
Match the license with other files. Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
Introduce the generic paging traits, page-level marker types. Keep the pagetable module unwired until the implementation exists so this commit is self-contained. Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
Copy the existing kernel page table implementation into the paging crate without wiring it into the build yet. This gives reviewers a stable baseline so the extraction diff shows old code changing into generic crate code instead of appearing as entirely new code. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
…e crate
Wire the previously copied page-table baseline (from
`paging: copy kernel page table baseline`) into the `paging` crate as
a generic, architecture-agnostic implementation, and factor x86_64
specifics into their own module.
Refactor in `paging/src/pagetable.rs`:
- Convert `PageTable`, `PTEntry`, and walk/map/unmap helpers to be
parameterized over the trait types from `paging::traits`
(`PagingLevel`, `PagingHandler`, `GenericPageTableFlags`,
`ArchPagingMeta`, `SelfMap`).
- Drop all svsm-internal dependencies that were carried over with
the baseline (`crate::cpu::*`, `crate::mm::*`, `crate::platform`,
`ImmutAfterInitCell`, `SvsmError`, CR/EFER helpers, encryption-
mask globals, `paging_init`, etc.). These responsibilities move
behind the `PagingHandler` / `ArchPagingMeta` traits and will be
re-supplied by the kernel in a later commit.
- Re-export the generic trait surface from `pagetable` so downstream
callers see one module.
- Introduce `PTE_SHIFT` and rely on `sizes::{PAGE_SHIFT, PAGE_SIZE,
PAGE_SIZE_2M, PAGE_SIZE_1G, PageSize}` from the paging crate
instead of `crate::types`.
Change (not pure refactor):
- Public `map_2m` / `map_4k` still allocate parent entries using the
default `parent_flags()` directly; caller-selectable parent flags
and the `DIRTY` parent default are intentionally deferred to
follow-up commits.
New `paging/src/x86_64.rs`:
- Move the x86_64-specific `PTEntryFlags` bitflags out of
`pagetable.rs` (now `usize`-backed) along with its helpers
(`exec`, `data`, `data_ro`, `task_exec`, `task_data`,
`task_data_ro`, and the `writable`/`user`/`nx`/`global`
accessors).
- Implement `GenericPageTableFlags` for `PTEntryFlags`, defining
`PRESENT`/`USER`/`HUGE`, `parent_flags()` (PRESENT | WRITABLE |
USER | ACCESSED), and `self_map_table_flags()` (PRESENT |
WRITABLE | ACCESSED | DIRTY | NX).
- Add `Pml4Level` (4-level PML4) and `PdptLevel` (PDPT-rooted
3-level sub-tree) type aliases over `traits::PagingLevel{3,2}`.
`paging/src/lib.rs`:
- Expose the new `pagetable` and `x86_64` modules.
No callers are migrated in this commit; the kernel still uses its own
copy of the page table code. Net diff: +434 / -1418 lines.
Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com>
Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
x86_64
Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
Replace the kernel-local page table implementation with wrappers around the generic paging crate. Add the SvsmPaging adapter for allocation, address conversion, feature masks, and self-map index configuration while preserving the kernel-facing PageTable and PageTablePart APIs. Co-authored-by: Copilot <223556219+Copilot@users.noreply.github.com> Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
Thread parent page-table flags through allocation and add map_2m_with_parent_flags and map_4k_with_parent_flags. The existing map_2m and map_4k APIs remain as default-parent-flag wrappers, making caller-selectable parent entry attributes a focused reviewable change. Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
Add DIRTY to the default x86_64 parent page-table entry flags to prevent hardware from updating the entry again. Signed-off-by: Ziqiao Zhou <ziqiaozhou@microsoft.com>
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This is the 3rd PR that should be applied after #1088 and #1062