v1.0.0

Blimp's current status as of my M.Eng. completion. Features include:

• Eight processor implementations, scaling from basic arithmetic to RV32IM support
• A custom, extensible assembler/disassembler and FL model
• Utilities and functional-level modules for testing (utilizing DPI to access high-level C++ features), as well as both unit and integration tests for all modules and processor compositions
• A CMake build system allowing for testing and simulation binaries from Verilog models, C++ tools and libraries, and RISCV programs
• Hardware for FPGA emulation, including VGA/PS2/SPI interfaces and a memory crossbar. The current implementation in main results in issues with Quartus Prime Lite Edition (v20.1 and v23.1); see the quartus branch for changes (not affecting the overall semantics)

Looking forward to seeing where Blimp goes in the future 🙂