This is a repository for running multi-file C/C++ programs in OpenLANE. This is meant to be run within a Caravel User Project structure
- Navigate to your test directory within your Caravel User Project and clone the repository. It is important to clone the directory with its given name,
chip_code_test- if you wish to rename it later, use therenameutility as described below.
% cd <CARAVEL_DIR>/verilog/dv
% git clone [email protected]:cornellcustomsiliconsystems/chip_code_test.git- If you are using C code, then the directory is already set up correctly. However, if you are using C++ code, then you should use that branch instead
% git checkout cpp- Navigate into the directory, and rename it using
renameand the references in files to your desired name- You will need to re-enter the directory to see the change on your terminal prompt
% cd chip_code_test
% ./rename <new_name>
% cd ..
% cd <new_name>Your C/C++ code should go in <new_name>.c or <new_name>.cpp for C/C++, respectively; this should be the code that has main. In addition, any source files you wish to use (along with their header files) should go in src
- The directory includes
utils.h, which contains several helper functions for testing and printing with the current test harness setup- To use testing functions, you must first call
test_config();. The same is true for the print function andprint_config(); - Testing uses GPIO's 37 and 36, whereas printing uses the hardware UART support in GPIO 6. If you use these functionalities, make sure that your code doesn't also use these GPIO's
- To use testing functions, you must first call
The test harness is meant to integrate seamlessly with OpenLane. Simply follow their documentation for running tests. For example:
% cd <CARAVEL_DIR>
% make verify-<new_name>-rtl