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Add support for building the client for Itanium (ANSI). #15

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2 changes: 1 addition & 1 deletion common/clisync.h
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Original file line number Diff line number Diff line change
Expand Up @@ -182,7 +182,7 @@
return 1;
}

#elif (CLIENT_CPU == CPU_X86) || (CLIENT_CPU == CPU_AMD64) || (CLIENT_CPU == CPU_CUDA) || (CLIENT_CPU == CPU_ATI_STREAM) || (CLIENT_CPU == CPU_OPENCL) || ((CLIENT_CPU == CPU_ARM) && !defined(__GNUC__))
#elif (CLIENT_CPU == CPU_X86) || (CLIENT_CPU == CPU_AMD64) || (CLIENT_CPU == CPU_IA64) || (CLIENT_CPU == CPU_CUDA) || (CLIENT_CPU == CPU_ATI_STREAM) || (CLIENT_CPU == CPU_OPENCL) || ((CLIENT_CPU == CPU_ARM) && !defined(__GNUC__))

typedef volatile long fastlock_t;

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5 changes: 5 additions & 0 deletions common/core_ogr_ng.cpp
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Expand Up @@ -84,6 +84,8 @@ return "@(#)$Id: core_ogr_ng.cpp,v 1.47 2015/06/27 21:43:52 zebe Exp $"; }
CoreDispatchTable *ogrng64_get_dispatch_table_cj1_generic(void);
CoreDispatchTable *ogrng64_get_dispatch_table_cj1_sse2(void);
CoreDispatchTable *ogrng64_get_dispatch_table_cj1_sse2_lzcnt(void);
#elif (CLIENT_CPU == CPU_IA64)
CoreDispatchTable *ogrng64_get_dispatch_table(void);
#elif (CLIENT_CPU == CPU_SPARC) && (SIZEOF_LONG == 8)
CoreDispatchTable *ogrng64_get_dispatch_table(void);
#elif (CLIENT_CPU == CPU_S390X) && (SIZEOF_LONG == 8)
Expand Down Expand Up @@ -644,6 +646,9 @@ int selcoreSelectCore_ogr_ng(Client *client, unsigned int threadindex,
unit_func.ogr = ogrng64_get_dispatch_table();
coresel = 0;
}
#elif (CLIENT_CPU == CPU_IA64)
unit_func.ogr = ogrng64_get_dispatch_table();
coresel = 0;
#elif (CLIENT_CPU == CPU_ARM64) && (SIZEOF_LONG == 8)
unit_func.ogr = ogrng64_get_dispatch_table();
coresel = 0;
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1 change: 1 addition & 0 deletions common/cputypes.h
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Expand Up @@ -616,6 +616,7 @@
(CLIENT_CPU == CPU_MIPS) || (CLIENT_CPU == CPU_ARM) || \
(CLIENT_CPU == CPU_AMD64) || (CLIENT_CPU == CPU_CUDA) || \
(CLIENT_CPU == CPU_ATI_STREAM) || (CLIENT_CPU == CPU_OPENCL) || \
(CLIENT_CPU == CPU_IA64) || \
((CLIENT_CPU == CPU_ALPHA) && ((CLIENT_OS == OS_WIN32) || \
(CLIENT_OS == OS_DEC_UNIX))))
#define CORES_SUPPORT_SMP
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24 changes: 24 additions & 0 deletions makefile.vc
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Expand Up @@ -4,7 +4,9 @@
# $Id: makefile.vc,v 1.141 2012/08/11 09:24:36 sla Exp $
#

#PROCESSOR_ARCHITECTURE = ALPHA
#PROCESSOR_ARCHITECTURE = AMD64
#PROCESSOR_ARCHITECTURE = IA64
#PROCESSOR_ARCHITECTURE = cuda
#PROCESSOR_ARCHITECTURE = ATI_STREAM
#PROCESSOR_ARCHITECTURE = OPENCL
Expand Down Expand Up @@ -47,6 +49,11 @@ OPTS_CC_CPU = -D_AMD64_ -GS-
OPTS_M_PLAT = AMD64
CHIPSRCPATH = plat/$(PROCESSOR_ARCHITECTURE)
ZIPSUFFIX = win64-amd64
!elseif "$(PROCESSOR_ARCHITECTURE)" == "IA64"
OPTS_CC_CPU = -D_IA64_ -GS-
OPTS_M_PLAT = IA64
CHIPSRCPATH = plat/$(PROCESSOR_ARCHITECTURE)
ZIPSUFFIX = win64-ia64
!elseif "$(PROCESSOR_ARCHITECTURE)" == "cuda"
# This assumes 32-bit Windows since there's no advantage to using 64-bit
HAVE_OGR_CORES = 0
Expand Down Expand Up @@ -372,6 +379,12 @@ RC5_72_OBJS = \
$(OUTPUTPATH)/r72ansi2.obj \
$(OUTPUTPATH)/r72ansi4.obj
OPTS_MSVC = $(OPTS_MSVC) -DHAVE_RC5_72_CORES
!elseif "$(PROCESSOR_ARCHITECTURE)" == "IA64"
RC5_72_OBJS = \
$(OUTPUTPATH)/r72ansi1.obj \
$(OUTPUTPATH)/r72ansi2.obj \
$(OUTPUTPATH)/r72ansi4.obj
OPTS_MSVC = $(OPTS_MSVC) -DHAVE_RC5_72_CORES
!elseif "$(PROCESSOR_ARCHITECTURE)" == "x86"
RC5_72_OBJS = \
$(OUTPUTPATH)/r72-ses1.obj \
Expand Down Expand Up @@ -436,6 +449,11 @@ OGR_OBJS = \
$(OUTPUTPATH)/ogr_dat.obj \
$(OUTPUTPATH)/ogr_sup.obj
!elseif "$(PROCESSOR_ARCHITECTURE)" == "AMD64"
OGR_OBJS = \
$(OUTPUTPATH)/ogr.obj \
$(OUTPUTPATH)/ogr_dat.obj \
$(OUTPUTPATH)/ogr_sup.obj
!elseif "$(PROCESSOR_ARCHITECTURE)" == "IA64"
OGR_OBJS = \
$(OUTPUTPATH)/ogr.obj \
$(OUTPUTPATH)/ogr_dat.obj \
Expand Down Expand Up @@ -478,6 +496,12 @@ OGRNG_OBJS = \
$(OUTPUTPATH)/ogrng64-cj1-sse2-lzcnt-asm.obj \
$(OUTPUTPATH)/ogrng_init.obj \
$(OUTPUTPATH)/ogrng_dat.obj
!elseif "$(PROCESSOR_ARCHITECTURE)" == "IA64"
OGRNG_OBJS = \
$(OUTPUTPATH)/ogr_sup.obj \
$(OUTPUTPATH)/ogrng-64.obj \
$(OUTPUTPATH)/ogrng_init.obj \
$(OUTPUTPATH)/ogrng_dat.obj
!elseif "$(PROCESSOR_ARCHITECTURE)" == "x86"
OGRNG_OBJS = \
$(OUTPUTPATH)/ogr_sup.obj \
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