Implement branch-and-link instructions #74
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AngheloAlf
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Feb 25, 2025
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AngheloAlf
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I think the code is okay, but I'm not completely sure either.
Since this is still generating the same code for the current programs then it should be fine, worse case scenario only ld 7.1 is broken
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| if (insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_jal || | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_j) { | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_j || | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_bal || | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_bltzal || | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_bgezal || | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_bltzall || | ||
| insn.instruction.getUniqueId() == rabbitizer::InstrId::UniqueId::cpu_bgezall) { |
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This starts to look like switch territory
| } | ||
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| void pass4(void) { | ||
| vector<uint32_t> q; // TODO: Why is this called q? |
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lmao, it was so obvious. Wonder what we were thinking at the time
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For the live register tracking in pass4/pass5, the logic added an implicit edge between instructions i + 1 and i + 2 to skip a function call, but this doesn't work for bltzall/bgezall since instruction i + 1 may not be be executed. I turned this in an explicit edge instead. I diffed all the existing programs and there are no changes to the generated C code. The implementation kinda makes my head hurt though so I'd appreciate some double-checking