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Add CPUID for AvxVnniInt8 and AvxVnniInt16 #113956

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5bc2b34
Add CPUID for AvxVnniInt8 and AvxVnniInt16
khushal1996 Mar 26, 2025
5372b24
AVXVNNIINT* API surface and template tests
khushal1996 Mar 29, 2025
3fcd674
Run formatting
khushal1996 Apr 14, 2025
f07b326
Remove new keyword where not required
khushal1996 Apr 15, 2025
14e224b
Move AvxVnniInt* with other Vex instruction sets
khushal1996 Apr 17, 2025
64e1f7d
Add smoke test for Avx10.2 and add AvxvnniInt* Isas to those tests
khushal1996 Apr 17, 2025
93f2eb5
Correct smoke tests for avx2
khushal1996 Apr 17, 2025
4fb7b25
Add AvxVnniInt* implications
khushal1996 Apr 18, 2025
2326663
correct smoke test for AVX2
khushal1996 Apr 18, 2025
73f4fbe
Enable Vex encoding of AvxVnniInt* instructions when Avx10.2 is not a…
khushal1996 Apr 18, 2025
7056dba
Avx10.2 will support VEX versions of AvxVnniInt*
khushal1996 Apr 29, 2025
2a3a10a
Run formatting
khushal1996 Apr 29, 2025
12d90eb
Disable Avx10.2 smoketest
khushal1996 May 9, 2025
0863c8d
Fix the Avx10.2 smoketest
khushal1996 May 15, 2025
93ac5b9
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 15, 2025
08f256a
Fix the smoketest
khushal1996 May 15, 2025
1bb97e7
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 19, 2025
056b4e4
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 19, 2025
41faba6
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 20, 2025
266a1a4
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 21, 2025
70846a7
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 22, 2025
0ed5793
Merge remote-tracking branch 'origin' into kcm-avxvnniint8-cpuid
khushal1996 May 27, 2025
31246e5
Fix assert and instruction definition to merge with main
khushal1996 May 28, 2025
caccae4
Update src/coreclr/inc/clrconfigvalues.h
khushal1996 May 28, 2025
bceabb2
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 28, 2025
39c5296
Merge branch 'main' into kcm-avxvnniint8-cpuid
khushal1996 May 29, 2025
5a42eb2
Fix nativeAOT smoketests and address review comments
khushal1996 May 29, 2025
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2 changes: 2 additions & 0 deletions src/coreclr/inc/clrconfigvalues.h
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Original file line number Diff line number Diff line change
Expand Up @@ -695,6 +695,8 @@ RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX512VBMI_VL, W("EnableAVX512V
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v1, W("EnableAVX10v1"), 1, "Allows AVX10v1+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVX10v2, W("EnableAVX10v2"), 0, "Allows AVX10v2+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNI, W("EnableAVXVNNI"), 1, "Allows AVXVNNI+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNIINT8, W("EnableAVXVNNIINT8"), 1, "Allows AVXVNNI8+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableAVXVNNIINT16, W("EnableAVXVNNIINT16"), 1, "Allows AVXVNNI16+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI1, W("EnableBMI1"), 1, "Allows BMI1+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableBMI2, W("EnableBMI2"), 1, "Allows BMI2+ hardware intrinsics to be disabled")
RETAIL_CONFIG_DWORD_INFO(EXTERNAL_EnableFMA, W("EnableFMA"), 1, "Allows FMA+ hardware intrinsics to be disabled")
Expand Down
188 changes: 132 additions & 56 deletions src/coreclr/inc/corinfoinstructionset.h
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Original file line number Diff line number Diff line change
Expand Up @@ -96,34 +96,40 @@ enum CORINFO_InstructionSet
InstructionSet_GFNI=44,
InstructionSet_GFNI_V256=45,
InstructionSet_GFNI_V512=46,
InstructionSet_X86Base_X64=47,
InstructionSet_SSE_X64=48,
InstructionSet_SSE2_X64=49,
InstructionSet_SSE3_X64=50,
InstructionSet_SSSE3_X64=51,
InstructionSet_SSE41_X64=52,
InstructionSet_SSE42_X64=53,
InstructionSet_AVX_X64=54,
InstructionSet_AVX2_X64=55,
InstructionSet_AES_X64=56,
InstructionSet_BMI1_X64=57,
InstructionSet_BMI2_X64=58,
InstructionSet_FMA_X64=59,
InstructionSet_LZCNT_X64=60,
InstructionSet_PCLMULQDQ_X64=61,
InstructionSet_POPCNT_X64=62,
InstructionSet_AVXVNNI_X64=63,
InstructionSet_X86Serialize_X64=64,
InstructionSet_AVX512F_X64=65,
InstructionSet_AVX512BW_X64=66,
InstructionSet_AVX512CD_X64=67,
InstructionSet_AVX512DQ_X64=68,
InstructionSet_AVX512VBMI_X64=69,
InstructionSet_AVX10v1_X64=70,
InstructionSet_AVX10v1_V512_X64=71,
InstructionSet_AVX10v2_X64=72,
InstructionSet_AVX10v2_V512_X64=73,
InstructionSet_GFNI_X64=74,
InstructionSet_AVXVNNIINT8=47,
InstructionSet_AVXVNNIINT8_V512=48,
InstructionSet_AVXVNNIINT16=49,
InstructionSet_AVXVNNIINT16_V512=50,
InstructionSet_X86Base_X64=51,
InstructionSet_SSE_X64=52,
InstructionSet_SSE2_X64=53,
InstructionSet_SSE3_X64=54,
InstructionSet_SSSE3_X64=55,
InstructionSet_SSE41_X64=56,
InstructionSet_SSE42_X64=57,
InstructionSet_AVX_X64=58,
InstructionSet_AVX2_X64=59,
InstructionSet_AES_X64=60,
InstructionSet_BMI1_X64=61,
InstructionSet_BMI2_X64=62,
InstructionSet_FMA_X64=63,
InstructionSet_LZCNT_X64=64,
InstructionSet_PCLMULQDQ_X64=65,
InstructionSet_POPCNT_X64=66,
InstructionSet_AVXVNNI_X64=67,
InstructionSet_X86Serialize_X64=68,
InstructionSet_AVX512F_X64=69,
InstructionSet_AVX512BW_X64=70,
InstructionSet_AVX512CD_X64=71,
InstructionSet_AVX512DQ_X64=72,
InstructionSet_AVX512VBMI_X64=73,
InstructionSet_AVX10v1_X64=74,
InstructionSet_AVX10v1_V512_X64=75,
InstructionSet_AVX10v2_X64=76,
InstructionSet_AVX10v2_V512_X64=77,
InstructionSet_GFNI_X64=78,
InstructionSet_AVXVNNIINT8_X64=79,
InstructionSet_AVXVNNIINT16_X64=80,
#endif // TARGET_AMD64
#ifdef TARGET_X86
InstructionSet_X86Base=1,
Expand Down Expand Up @@ -172,34 +178,40 @@ enum CORINFO_InstructionSet
InstructionSet_GFNI=44,
InstructionSet_GFNI_V256=45,
InstructionSet_GFNI_V512=46,
InstructionSet_X86Base_X64=47,
InstructionSet_SSE_X64=48,
InstructionSet_SSE2_X64=49,
InstructionSet_SSE3_X64=50,
InstructionSet_SSSE3_X64=51,
InstructionSet_SSE41_X64=52,
InstructionSet_SSE42_X64=53,
InstructionSet_AVX_X64=54,
InstructionSet_AVX2_X64=55,
InstructionSet_AES_X64=56,
InstructionSet_BMI1_X64=57,
InstructionSet_BMI2_X64=58,
InstructionSet_FMA_X64=59,
InstructionSet_LZCNT_X64=60,
InstructionSet_PCLMULQDQ_X64=61,
InstructionSet_POPCNT_X64=62,
InstructionSet_AVXVNNI_X64=63,
InstructionSet_X86Serialize_X64=64,
InstructionSet_AVX512F_X64=65,
InstructionSet_AVX512BW_X64=66,
InstructionSet_AVX512CD_X64=67,
InstructionSet_AVX512DQ_X64=68,
InstructionSet_AVX512VBMI_X64=69,
InstructionSet_AVX10v1_X64=70,
InstructionSet_AVX10v1_V512_X64=71,
InstructionSet_AVX10v2_X64=72,
InstructionSet_AVX10v2_V512_X64=73,
InstructionSet_GFNI_X64=74,
InstructionSet_AVXVNNIINT8=47,
InstructionSet_AVXVNNIINT8_V512=48,
InstructionSet_AVXVNNIINT16=49,
InstructionSet_AVXVNNIINT16_V512=50,
InstructionSet_X86Base_X64=51,
InstructionSet_SSE_X64=52,
InstructionSet_SSE2_X64=53,
InstructionSet_SSE3_X64=54,
InstructionSet_SSSE3_X64=55,
InstructionSet_SSE41_X64=56,
InstructionSet_SSE42_X64=57,
InstructionSet_AVX_X64=58,
InstructionSet_AVX2_X64=59,
InstructionSet_AES_X64=60,
InstructionSet_BMI1_X64=61,
InstructionSet_BMI2_X64=62,
InstructionSet_FMA_X64=63,
InstructionSet_LZCNT_X64=64,
InstructionSet_PCLMULQDQ_X64=65,
InstructionSet_POPCNT_X64=66,
InstructionSet_AVXVNNI_X64=67,
InstructionSet_X86Serialize_X64=68,
InstructionSet_AVX512F_X64=69,
InstructionSet_AVX512BW_X64=70,
InstructionSet_AVX512CD_X64=71,
InstructionSet_AVX512DQ_X64=72,
InstructionSet_AVX512VBMI_X64=73,
InstructionSet_AVX10v1_X64=74,
InstructionSet_AVX10v1_V512_X64=75,
InstructionSet_AVX10v2_X64=76,
InstructionSet_AVX10v2_V512_X64=77,
InstructionSet_GFNI_X64=78,
InstructionSet_AVXVNNIINT8_X64=79,
InstructionSet_AVXVNNIINT16_X64=80,
#endif // TARGET_X86

};
Expand Down Expand Up @@ -375,6 +387,10 @@ struct CORINFO_InstructionSetFlags
AddInstructionSet(InstructionSet_AVX10v2_V512_X64);
if (HasInstructionSet(InstructionSet_GFNI))
AddInstructionSet(InstructionSet_GFNI_X64);
if (HasInstructionSet(InstructionSet_AVXVNNIINT8))
AddInstructionSet(InstructionSet_AVXVNNIINT8_X64);
if (HasInstructionSet(InstructionSet_AVXVNNIINT16))
AddInstructionSet(InstructionSet_AVXVNNIINT16_X64);
#endif // TARGET_AMD64
#ifdef TARGET_X86
#endif // TARGET_X86
Expand Down Expand Up @@ -579,6 +595,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_GFNI);
if (resultflags.HasInstructionSet(InstructionSet_GFNI_X64) && !resultflags.HasInstructionSet(InstructionSet_GFNI))
resultflags.RemoveInstructionSet(InstructionSet_GFNI_X64);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_X64))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_X64) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8_X64);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_X64))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_X64) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16_X64);
if (resultflags.HasInstructionSet(InstructionSet_SSE) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
resultflags.RemoveInstructionSet(InstructionSet_SSE);
if (resultflags.HasInstructionSet(InstructionSet_SSE2) && !resultflags.HasInstructionSet(InstructionSet_SSE))
Expand Down Expand Up @@ -653,6 +677,10 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ_V512);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16);
if (resultflags.HasInstructionSet(InstructionSet_X86Serialize) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
resultflags.RemoveInstructionSet(InstructionSet_X86Serialize);
if (resultflags.HasInstructionSet(InstructionSet_GFNI) && !resultflags.HasInstructionSet(InstructionSet_SSE41))
Expand Down Expand Up @@ -693,6 +721,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512))
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8))
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16))
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8_V512);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16_V512);
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
Expand Down Expand Up @@ -781,6 +817,10 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_PCLMULQDQ_V512);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNI) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNI);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16) && !resultflags.HasInstructionSet(InstructionSet_AVX2))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16);
if (resultflags.HasInstructionSet(InstructionSet_X86Serialize) && !resultflags.HasInstructionSet(InstructionSet_X86Base))
resultflags.RemoveInstructionSet(InstructionSet_X86Serialize);
if (resultflags.HasInstructionSet(InstructionSet_GFNI) && !resultflags.HasInstructionSet(InstructionSet_SSE41))
Expand Down Expand Up @@ -821,6 +861,14 @@ inline CORINFO_InstructionSetFlags EnsureInstructionSetFlagsAreValid(CORINFO_Ins
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v1_V512))
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2_V512);
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8))
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
if (resultflags.HasInstructionSet(InstructionSet_AVX10v2) && !resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16))
resultflags.RemoveInstructionSet(InstructionSet_AVX10v2);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT8_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT8_V512);
if (resultflags.HasInstructionSet(InstructionSet_AVXVNNIINT16_V512) && !resultflags.HasInstructionSet(InstructionSet_AVX10v2_V512))
resultflags.RemoveInstructionSet(InstructionSet_AVXVNNIINT16_V512);
if (resultflags.HasInstructionSet(InstructionSet_Vector128) && !resultflags.HasInstructionSet(InstructionSet_SSE))
resultflags.RemoveInstructionSet(InstructionSet_Vector128);
if (resultflags.HasInstructionSet(InstructionSet_Vector256) && !resultflags.HasInstructionSet(InstructionSet_AVX))
Expand Down Expand Up @@ -1061,6 +1109,18 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "GFNI_V256";
case InstructionSet_GFNI_V512 :
return "GFNI_V512";
case InstructionSet_AVXVNNIINT8 :
return "AVXVNNIINT8";
case InstructionSet_AVXVNNIINT8_X64 :
return "AVXVNNIINT8_X64";
case InstructionSet_AVXVNNIINT8_V512 :
return "AVXVNNIINT8_V512";
case InstructionSet_AVXVNNIINT16 :
return "AVXVNNIINT16";
case InstructionSet_AVXVNNIINT16_X64 :
return "AVXVNNIINT16_X64";
case InstructionSet_AVXVNNIINT16_V512 :
return "AVXVNNIINT16_V512";
#endif // TARGET_AMD64
#ifdef TARGET_X86
case InstructionSet_X86Base :
Expand Down Expand Up @@ -1155,6 +1215,14 @@ inline const char *InstructionSetToString(CORINFO_InstructionSet instructionSet)
return "GFNI_V256";
case InstructionSet_GFNI_V512 :
return "GFNI_V512";
case InstructionSet_AVXVNNIINT8 :
return "AVXVNNIINT8";
case InstructionSet_AVXVNNIINT8_V512 :
return "AVXVNNIINT8_V512";
case InstructionSet_AVXVNNIINT16 :
return "AVXVNNIINT16";
case InstructionSet_AVXVNNIINT16_V512 :
return "AVXVNNIINT16_V512";
#endif // TARGET_X86

default:
Expand Down Expand Up @@ -1239,6 +1307,10 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
case READYTORUN_INSTRUCTION_Gfni: return InstructionSet_GFNI;
case READYTORUN_INSTRUCTION_Gfni_V256: return InstructionSet_GFNI_V256;
case READYTORUN_INSTRUCTION_Gfni_V512: return InstructionSet_GFNI_V512;
case READYTORUN_INSTRUCTION_AvxVnniInt8: return InstructionSet_AVXVNNIINT8;
case READYTORUN_INSTRUCTION_AvxVnniInt8_V512: return InstructionSet_AVXVNNIINT8_V512;
case READYTORUN_INSTRUCTION_AvxVnniInt16: return InstructionSet_AVXVNNIINT16;
case READYTORUN_INSTRUCTION_AvxVnniInt16_V512: return InstructionSet_AVXVNNIINT16_V512;
#endif // TARGET_AMD64
#ifdef TARGET_X86
case READYTORUN_INSTRUCTION_X86Base: return InstructionSet_X86Base;
Expand Down Expand Up @@ -1284,6 +1356,10 @@ inline CORINFO_InstructionSet InstructionSetFromR2RInstructionSet(ReadyToRunInst
case READYTORUN_INSTRUCTION_Gfni: return InstructionSet_GFNI;
case READYTORUN_INSTRUCTION_Gfni_V256: return InstructionSet_GFNI_V256;
case READYTORUN_INSTRUCTION_Gfni_V512: return InstructionSet_GFNI_V512;
case READYTORUN_INSTRUCTION_AvxVnniInt8: return InstructionSet_AVXVNNIINT8;
case READYTORUN_INSTRUCTION_AvxVnniInt8_V512: return InstructionSet_AVXVNNIINT8_V512;
case READYTORUN_INSTRUCTION_AvxVnniInt16: return InstructionSet_AVXVNNIINT16;
case READYTORUN_INSTRUCTION_AvxVnniInt16_V512: return InstructionSet_AVXVNNIINT16_V512;
#endif // TARGET_X86

default:
Expand Down
10 changes: 5 additions & 5 deletions src/coreclr/inc/jiteeversionguid.h
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -37,11 +37,11 @@

#include <minipal/guid.h>

constexpr GUID JITEEVersionIdentifier = { /* bffedb4e-ed47-4df3-8156-7ad8fc8521f1 */
0xbffedb4e,
0xed47,
0x4df3,
{0x81, 0x56, 0x7a, 0xd8, 0xfc, 0x85, 0x21, 0xf1}
constexpr GUID JITEEVersionIdentifier = { /* 8c86e120-6601-4879-a897-0ecec4701d03 */
0x8c86e120,
0x6601,
0x4879,
{0xa8, 0x97, 0x0e, 0xce, 0xc4, 0x70, 0x1d, 0x03}
};

#endif // JIT_EE_VERSIONING_GUID_H
4 changes: 4 additions & 0 deletions src/coreclr/inc/readytoruninstructionset.h
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Original file line number Diff line number Diff line change
Expand Up @@ -67,6 +67,10 @@ enum ReadyToRunInstructionSet
READYTORUN_INSTRUCTION_Zba=57,
READYTORUN_INSTRUCTION_Zbb=58,
READYTORUN_INSTRUCTION_Sve2=59,
READYTORUN_INSTRUCTION_AvxVnniInt8=60,
READYTORUN_INSTRUCTION_AvxVnniInt8_V512=61,
READYTORUN_INSTRUCTION_AvxVnniInt16=62,
READYTORUN_INSTRUCTION_AvxVnniInt16_V512=63,

};

Expand Down
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