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pre-commit: PR130504 #2199

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a561468
pre-commit: PR130504
nikic Mar 9, 2025
b5061a7
pre-commit: Update
github-actions[bot] Mar 9, 2025
9c38e39
pre-commit: Remap
github-actions[bot] Mar 9, 2025
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2 changes: 1 addition & 1 deletion bench/abc/optimized/FxchMan.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -1299,7 +1299,7 @@ Vec_QueGrow.exit.i: ; preds = %.Vec_QueGrow.exit.i

72: ; preds = %Vec_QueGrow.exit.i
%73 = shl nsw i32 %71, 1
%74 = trunc i64 %indvars.iv to i32
%74 = trunc nsw i64 %indvars.iv to i32
%75 = add nsw i32 %74, 1
%76 = tail call noundef i32 @llvm.smax.i32(i32 %75, i32 %73)
%77 = getelementptr inbounds nuw i8, ptr %31, i64 8
Expand Down
51 changes: 25 additions & 26 deletions bench/arrow/optimized/compare.ll
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Expand Up @@ -18874,20 +18874,19 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE14FindCurrentRunEv.exit: ; preds =
%54 = and i64 %.0..0..0..0..0..0..0..0..i.i, %53
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)
%55 = getelementptr inbounds nuw i8, ptr %0, i64 24
%56 = trunc i64 %.pr to i32
%56 = trunc nuw nsw i64 %.pr to i32
%57 = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %54, i1 false)
%58 = trunc nuw nsw i64 %57 to i32
%.sroa.speculated.i = tail call i32 @llvm.umin.i32(i32 %58, i32 %56)
%59 = zext nneg i32 %.sroa.speculated.i to i64
%60 = lshr i64 %54, %59
store i64 %60, ptr %55, align 8, !tbaa !987
%61 = sub nsw i32 %56, %.sroa.speculated.i
store i32 %61, ptr %4, align 8, !tbaa !988
%62 = sub nsw i64 %.pr, %59
%.sroa.speculated13.i = tail call i64 @llvm.umin.i64(i64 %57, i64 %.pr)
%.sroa.speculated.i = trunc nuw nsw i64 %.sroa.speculated13.i to i32
%58 = lshr i64 %54, %.sroa.speculated13.i
store i64 %58, ptr %55, align 8, !tbaa !987
%59 = sub nsw i32 %56, %.sroa.speculated.i
store i32 %59, ptr %4, align 8, !tbaa !988
%60 = sub nsw i64 %.pr, %.sroa.speculated13.i
br label %.sink.split.i

.sink.split.i: ; preds = %45, %.thread.i
%.sink.i = phi i64 [ %40, %.thread.i ], [ %62, %45 ]
%.sink.i = phi i64 [ %40, %.thread.i ], [ %60, %45 ]
store i64 %.sink.i, ptr %28, align 8, !tbaa !986
br label %_ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit

Expand All @@ -18904,21 +18903,21 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit: ; preds = %

69: ; preds = %27
%.not28 = icmp eq i32 %5, %24
br i1 %.not28, label %70, label %91
br i1 %.not28, label %72, label %91

70: ; preds = %69
%71 = icmp sgt i64 %26, 63
br i1 %71, label %72, label %75, !prof !96
72: ; preds = %67
%69 = icmp sgt i64 %26, 63
br i1 %69, label %70, label %73, !prof !96

72: ; preds = %70
%73 = load ptr, ptr %0, align 8, !tbaa !989
%.0.copyload.i = load i64, ptr %73, align 1
%74 = getelementptr inbounds nuw i8, ptr %73, i64 8
store ptr %74, ptr %0, align 8, !tbaa !989
70:; preds = %68
%71 = load ptr, ptr %0, align 8, !tbaa !989
%.0.copyload.i = load i64, ptr %71, align 1
%72 = getelementptr inbounds nuw i8, ptr %71, i64 8
store ptr %72, ptr %0, align 8, !tbaa !989
store i64 %.0.copyload.i, ptr %7, align 8, !tbaa !987
br label %88

75: ; preds = %70
75: ; preds = %72
%76 = icmp sgt i64 %26, 0
br i1 %76, label %77, label %94

Expand All @@ -18940,12 +18939,12 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit: ; preds = %
%86 = and i64 %.0..0..0..0..0..0..i, %85
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)
store i64 %86, ptr %7, align 8, !tbaa !987
%87 = trunc i64 %26 to i32
%87 = trunc nuw nsw i64 %26 to i32
br label %88

88: ; preds = %77, %72
%89 = phi i64 [ %86, %77 ], [ %.0.copyload.i, %72 ]
%storemerge = phi i32 [ %87, %77 ], [ 64, %72 ]
88: ; preds = %77, %70
%89 = phi i64 [ %86, %77 ], [ %.0.copyload.i, %70 ]
%storemerge = phi i32 [ %87, %77 ], [ 64, %70 ]
store i32 %storemerge, ptr %4, align 8, !tbaa !988
%90 = and i64 %89, 1
%.not29 = icmp eq i64 %90, 0
Expand Down Expand Up @@ -19061,7 +19060,7 @@ define linkonce_odr noundef i64 @_ZN5arrow8internal19BaseSetBitRunReaderILb0EE13
%47 = xor i64 %notmask.i.i, -1
%48 = and i64 %.0..0..0..0..0..0..i, %47
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)
%49 = trunc i64 %25 to i32
%49 = trunc nuw nsw i64 %25 to i32
%50 = getelementptr inbounds nuw i8, ptr %0, i64 32
%51 = xor i64 %48, -1
%52 = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %51, i1 true)
Expand Down Expand Up @@ -21846,7 +21845,7 @@ declare i64 @llvm.usub.sat.i64(i64, i64) #23
declare i32 @llvm.smin.i32(i32, i32) #23

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #23
declare i64 @llvm.umin.i64(i64, i64) #23

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.smin.i64(i64, i64) #23
Expand Down
55 changes: 27 additions & 28 deletions bench/arrow/optimized/int_util.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -19971,20 +19971,19 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE14FindCurrentRunEv.exit: ; preds =
%54 = and i64 %.0..0..0..0..0..0..0..0..i.i, %53
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)
%55 = getelementptr inbounds nuw i8, ptr %0, i64 24
%56 = trunc i64 %.pr to i32
%56 = trunc nuw nsw i64 %.pr to i32
%57 = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %54, i1 false)
%58 = trunc nuw nsw i64 %57 to i32
%.sroa.speculated.i = tail call i32 @llvm.umin.i32(i32 %58, i32 %56)
%59 = zext nneg i32 %.sroa.speculated.i to i64
%60 = lshr i64 %54, %59
store i64 %60, ptr %55, align 8, !tbaa !1223
%61 = sub nsw i32 %56, %.sroa.speculated.i
store i32 %61, ptr %4, align 8, !tbaa !1224
%62 = sub nsw i64 %.pr, %59
%.sroa.speculated13.i = tail call i64 @llvm.umin.i64(i64 %57, i64 %.pr)
%.sroa.speculated.i = trunc nuw nsw i64 %.sroa.speculated13.i to i32
%58 = lshr i64 %54, %.sroa.speculated13.i
store i64 %58, ptr %55, align 8, !tbaa !1223
%59 = sub nsw i32 %56, %.sroa.speculated.i
store i32 %59, ptr %4, align 8, !tbaa !1224
%60 = sub nsw i64 %.pr, %.sroa.speculated13.i
br label %.sink.split.i

.sink.split.i: ; preds = %45, %.thread.i
%.sink.i = phi i64 [ %40, %.thread.i ], [ %62, %45 ]
%.sink.i = phi i64 [ %40, %.thread.i ], [ %60, %45 ]
store i64 %.sink.i, ptr %28, align 8, !tbaa !1222
br label %_ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit

Expand Down Expand Up @@ -20037,7 +20036,7 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit: ; preds = %
%86 = and i64 %.0..0..0..0..0..0..i, %85
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)
store i64 %86, ptr %7, align 8, !tbaa !1223
%87 = trunc i64 %26 to i32
%87 = trunc nuw nsw i64 %26 to i32
br label %88

88: ; preds = %77, %72
Expand Down Expand Up @@ -20252,7 +20251,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i: ; preds = %32, %30, %26, %22,
br label %_ZNSt8__detail18__to_chars_10_implIjEEvPcjT_.exit.i.i

72: ; preds = %._crit_edge.i.i.i
%73 = trunc nuw i32 %.0.lcssa.i.i.i to i8
%73 = trunc nuw nsw i32 %.0.lcssa.i.i.i to i8
%74 = or disjoint i8 %73, 48
br label %_ZNSt8__detail18__to_chars_10_implIjEEvPcjT_.exit.i.i

Expand Down Expand Up @@ -20438,7 +20437,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i19: ; preds = %121, %119, %115, %
br label %._crit_edge.loopexit48

161: ; preds = %._crit_edge.i.i.i21
%162 = trunc nuw i32 %.0.lcssa.i.i.i22 to i8
%162 = trunc nuw nsw i32 %.0.lcssa.i.i.i22 to i8
%163 = or disjoint i8 %162, 48
br label %._crit_edge.loopexit48

Expand Down Expand Up @@ -20631,7 +20630,7 @@ define linkonce_odr noundef i64 @_ZN5arrow8internal19BaseSetBitRunReaderILb0EE13
%47 = xor i64 %notmask.i.i, -1
%48 = and i64 %.0..0..0..0..0..0..i, %47
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)
%49 = trunc i64 %25 to i32
%49 = trunc nuw nsw i64 %25 to i32
%50 = getelementptr inbounds nuw i8, ptr %0, i64 32
%51 = xor i64 %48, -1
%52 = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %51, i1 true)
Expand Down Expand Up @@ -20822,7 +20821,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i: ; preds = %32, %30, %26, %22,
br label %_ZNSt8__detail18__to_chars_10_implIjEEvPcjT_.exit.i.i

72: ; preds = %._crit_edge.i.i.i
%73 = trunc nuw i32 %.0.lcssa.i.i.i to i8
%73 = trunc nuw nsw i32 %.0.lcssa.i.i.i to i8
%74 = or disjoint i8 %73, 48
br label %_ZNSt8__detail18__to_chars_10_implIjEEvPcjT_.exit.i.i

Expand Down Expand Up @@ -21008,7 +21007,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i19: ; preds = %121, %119, %115, %
br label %._crit_edge.loopexit48

161: ; preds = %._crit_edge.i.i.i21
%162 = trunc nuw i32 %.0.lcssa.i.i.i22 to i8
%162 = trunc nuw nsw i32 %.0.lcssa.i.i.i22 to i8
%163 = or disjoint i8 %162, 48
br label %._crit_edge.loopexit48

Expand Down Expand Up @@ -21198,7 +21197,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i: ; preds = %31, %29, %25, %21,
br label %_ZNSt8__detail18__to_chars_10_implIjEEvPcjT_.exit.i.i

71: ; preds = %._crit_edge.i.i.i
%72 = trunc nuw i32 %.0.lcssa.i.i.i to i8
%72 = trunc nuw nsw i32 %.0.lcssa.i.i.i to i8
%73 = or disjoint i8 %72, 48
br label %_ZNSt8__detail18__to_chars_10_implIjEEvPcjT_.exit.i.i

Expand Down Expand Up @@ -21384,7 +21383,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i19: ; preds = %120, %118, %114, %
br label %._crit_edge.loopexit48

160: ; preds = %._crit_edge.i.i.i21
%161 = trunc nuw i32 %.0.lcssa.i.i.i22 to i8
%161 = trunc nuw nsw i32 %.0.lcssa.i.i.i22 to i8
%162 = or disjoint i8 %161, 48
br label %._crit_edge.loopexit48

Expand Down Expand Up @@ -21570,7 +21569,7 @@ _ZNSt8__detail14__to_chars_lenImEEjT_i.exit.i.i: ; preds = %31, %29, %25, %21,
br label %_ZNSt8__detail18__to_chars_10_implImEEvPcjT_.exit.i.i

67: ; preds = %._crit_edge.i.i.i
%68 = trunc nuw i64 %.0.lcssa.i.i.i to i8
%68 = trunc nuw nsw i64 %.0.lcssa.i.i.i to i8
%69 = or disjoint i8 %68, 48
br label %_ZNSt8__detail18__to_chars_10_implImEEvPcjT_.exit.i.i

Expand Down Expand Up @@ -21752,7 +21751,7 @@ _ZNSt8__detail14__to_chars_lenImEEjT_i.exit.i.i19: ; preds = %116, %114, %110, %
br label %._crit_edge.loopexit48

152: ; preds = %._crit_edge.i.i.i21
%153 = trunc nuw i64 %.0.lcssa.i.i.i22 to i8
%153 = trunc nuw nsw i64 %.0.lcssa.i.i.i22 to i8
%154 = or disjoint i8 %153, 48
br label %._crit_edge.loopexit48

Expand Down Expand Up @@ -22241,7 +22240,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i: ; preds = %17, %15, %.lr.ph.i.
br label %_ZSt12__to_chars_iItENSt9enable_ifIXsr5__or_ISt5__or_IJSt7is_sameINSt9remove_cvIT_E4typeEaES2_IS6_sES2_IS6_iES2_IS6_lES2_IS6_xEEES1_IJS2_IS6_hES2_IS6_tES2_IS6_jES2_IS6_mES2_IS6_yEEES2_IcS6_EEE5valueESt15to_chars_resultE4typeEPcSN_S4_i.exit.._crit_edge_crit_edge

56: ; preds = %._crit_edge.i.i.i
%57 = trunc nuw i32 %.0.lcssa.i.i.i to i8
%57 = trunc nuw nsw i32 %.0.lcssa.i.i.i to i8
%58 = or disjoint i8 %57, 48
br label %_ZSt12__to_chars_iItENSt9enable_ifIXsr5__or_ISt5__or_IJSt7is_sameINSt9remove_cvIT_E4typeEaES2_IS6_sES2_IS6_iES2_IS6_lES2_IS6_xEEES1_IJS2_IS6_hES2_IS6_tES2_IS6_jES2_IS6_mES2_IS6_yEEES2_IcS6_EEE5valueESt15to_chars_resultE4typeEPcSN_S4_i.exit.._crit_edge_crit_edge

Expand Down Expand Up @@ -22364,7 +22363,7 @@ _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6resizeEm.exit.us38: ; pred
br i1 %111, label %.lr.ph.i9.i.i28.us, label %._crit_edge.i.i.i18.loopexit.us, !llvm.loop !1233

112: ; preds = %._crit_edge.i.i.i18.loopexit.us
%113 = trunc nuw i32 %97 to i8
%113 = trunc nuw nsw i32 %97 to i8
%114 = or disjoint i8 %113, 48
br label %._crit_edge.loopexit52

Expand Down Expand Up @@ -22393,7 +22392,7 @@ _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE6resizeEm.exit.us38: ; pred
.lr.ph.split.split: ; preds = %.lr.ph.split
%127 = icmp ult i16 %1, 10
%128 = icmp samesign ugt i16 %1, 9
%129 = trunc nuw i16 %1 to i8
%129 = trunc nuw nsw i16 %1 to i8
%130 = or disjoint i8 %129, 48
%131 = shl nuw nsw i32 %8, 1
%132 = or disjoint i32 %131, 1
Expand Down Expand Up @@ -22621,7 +22620,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i: ; preds = %24, %22, %18, %14,
br label %_ZSt12__to_chars_iIjENSt9enable_ifIXsr5__or_ISt5__or_IJSt7is_sameINSt9remove_cvIT_E4typeEaES2_IS6_sES2_IS6_iES2_IS6_lES2_IS6_xEEES1_IJS2_IS6_hES2_IS6_tES2_IS6_jES2_IS6_mES2_IS6_yEEES2_IcS6_EEE5valueESt15to_chars_resultE4typeEPcSN_S4_i.exit.._crit_edge_crit_edge

64: ; preds = %._crit_edge.i.i.i
%65 = trunc nuw i32 %.0.lcssa.i.i.i to i8
%65 = trunc nuw nsw i32 %.0.lcssa.i.i.i to i8
%66 = or disjoint i8 %65, 48
br label %_ZSt12__to_chars_iIjENSt9enable_ifIXsr5__or_ISt5__or_IJSt7is_sameINSt9remove_cvIT_E4typeEaES2_IS6_sES2_IS6_iES2_IS6_lES2_IS6_xEEES1_IJS2_IS6_hES2_IS6_tES2_IS6_jES2_IS6_mES2_IS6_yEEES2_IcS6_EEE5valueESt15to_chars_resultE4typeEPcSN_S4_i.exit.._crit_edge_crit_edge

Expand Down Expand Up @@ -22793,7 +22792,7 @@ _ZNSt8__detail14__to_chars_lenIjEEjT_i.exit.i.i17: ; preds = %109, %107, %103, %
br label %._crit_edge.loopexit47

148: ; preds = %._crit_edge.i.i.i19
%149 = trunc nuw i32 %.0.lcssa.i.i.i20 to i8
%149 = trunc nuw nsw i32 %.0.lcssa.i.i.i20 to i8
%150 = or disjoint i8 %149, 48
br label %._crit_edge.loopexit47

Expand Down Expand Up @@ -22962,7 +22961,7 @@ _ZNSt8__detail14__to_chars_lenImEEjT_i.exit.i.i: ; preds = %24, %22, %18, %14,
br label %_ZSt12__to_chars_iImENSt9enable_ifIXsr5__or_ISt5__or_IJSt7is_sameINSt9remove_cvIT_E4typeEaES2_IS6_sES2_IS6_iES2_IS6_lES2_IS6_xEEES1_IJS2_IS6_hES2_IS6_tES2_IS6_jES2_IS6_mES2_IS6_yEEES2_IcS6_EEE5valueESt15to_chars_resultE4typeEPcSN_S4_i.exit.._crit_edge_crit_edge

60: ; preds = %._crit_edge.i.i.i
%61 = trunc nuw i64 %.0.lcssa.i.i.i to i8
%61 = trunc nuw nsw i64 %.0.lcssa.i.i.i to i8
%62 = or disjoint i8 %61, 48
br label %_ZSt12__to_chars_iImENSt9enable_ifIXsr5__or_ISt5__or_IJSt7is_sameINSt9remove_cvIT_E4typeEaES2_IS6_sES2_IS6_iES2_IS6_lES2_IS6_xEEES1_IJS2_IS6_hES2_IS6_tES2_IS6_jES2_IS6_mES2_IS6_yEEES2_IcS6_EEE5valueESt15to_chars_resultE4typeEPcSN_S4_i.exit.._crit_edge_crit_edge

Expand Down Expand Up @@ -23130,7 +23129,7 @@ _ZNSt8__detail14__to_chars_lenImEEjT_i.exit.i.i17: ; preds = %105, %103, %99, %9
br label %._crit_edge.loopexit47

140: ; preds = %._crit_edge.i.i.i19
%141 = trunc nuw i64 %.0.lcssa.i.i.i20 to i8
%141 = trunc nuw nsw i64 %.0.lcssa.i.i.i20 to i8
%142 = or disjoint i8 %141, 48
br label %._crit_edge.loopexit47

Expand Down Expand Up @@ -26485,7 +26484,7 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #18
declare i32 @llvm.smin.i32(i32, i32) #19

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #19
declare i64 @llvm.umin.i64(i64, i64) #19

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.fshr.i64(i64, i64, i64) #19
Expand Down
9 changes: 5 additions & 4 deletions bench/arrow/optimized/interfaces.ll
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7199,9 +7199,9 @@ _ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD
br label %52

52: ; preds = %51, %49
%53 = trunc i64 %31 to i32
%53 = trunc nsw i64 %31 to i32
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %1) #33
%54 = icmp slt i32 %53, 1
%54 = icmp slt i64 %31, 1
br i1 %54, label %.thread, label %73

.thread: ; preds = %_ZZN9__gnu_cxx6__stoaIlicJiEEET0_PFT_PKT1_PPS3_DpT2_EPKcS5_PmS9_EN11_Save_errnoD2Ev.exit.i.i, %52
Expand Down Expand Up @@ -7259,6 +7259,7 @@ _ZN5arrow4util12ArrowLogBaselsIA87_cEERS1_RKT_.exit: ; preds = %.noexc24, %.noex

73: ; preds = %52, %_ZN5arrow4util12ArrowLogBaselsIA87_cEERS1_RKT_.exit, %22
%.113 = phi i32 [ 0, %22 ], [ %.2142, %_ZN5arrow4util12ArrowLogBaselsIA87_cEERS1_RKT_.exit ], [ %53, %52 ]
%.113.fr = freeze i32 %.113
%74 = load ptr, ptr %3, align 8, !tbaa !115
%75 = icmp eq ptr %74, %12
br i1 %75, label %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.thread.i.i, label %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i
Expand Down Expand Up @@ -7300,8 +7301,8 @@ _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit29: ; preds = %_ZN
87: ; preds = %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i, %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.thread.i.i
call void @llvm.lifetime.end.p0(i64 32, ptr nonnull %3) #33
call void @llvm.lifetime.start.p0(i64 24, ptr nonnull %5) #33
%88 = icmp sgt i32 %.113, 0
%spec.select = select i1 %88, i32 %.113, i32 8
%88 = icmp sgt i32 %.113.fr, 0
%spec.select = select i1 %88, i32 %.113.fr, i32 8
br label %89

89: ; preds = %87, %.thread3
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28 changes: 12 additions & 16 deletions bench/arrow/optimized/vector_selection_filter_internal.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -19697,20 +19697,19 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE14FindCurrentRunEv.exit: ; preds =
%54 = and i64 %.0..0..0..0..0..0..0..0..i.i, %53
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %3)
%55 = getelementptr inbounds nuw i8, ptr %0, i64 24
%56 = trunc i64 %.pr to i32
%56 = trunc nuw nsw i64 %.pr to i32
%57 = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %54, i1 false)
%58 = trunc nuw nsw i64 %57 to i32
%.sroa.speculated.i = tail call i32 @llvm.umin.i32(i32 %58, i32 %56)
%59 = zext nneg i32 %.sroa.speculated.i to i64
%60 = lshr i64 %54, %59
store i64 %60, ptr %55, align 8, !tbaa !751
%61 = sub nsw i32 %56, %.sroa.speculated.i
store i32 %61, ptr %4, align 8, !tbaa !752
%62 = sub nsw i64 %.pr, %59
%.sroa.speculated13.i = tail call i64 @llvm.umin.i64(i64 %57, i64 %.pr)
%.sroa.speculated.i = trunc nuw nsw i64 %.sroa.speculated13.i to i32
%58 = lshr i64 %54, %.sroa.speculated13.i
store i64 %58, ptr %55, align 8, !tbaa !751
%59 = sub nsw i32 %56, %.sroa.speculated.i
store i32 %59, ptr %4, align 8, !tbaa !752
%60 = sub nsw i64 %.pr, %.sroa.speculated13.i
br label %.sink.split.i

.sink.split.i: ; preds = %45, %.thread.i
%.sink.i = phi i64 [ %40, %.thread.i ], [ %62, %45 ]
%.sink.i = phi i64 [ %40, %.thread.i ], [ %60, %45 ]
store i64 %.sink.i, ptr %28, align 8, !tbaa !750
br label %_ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit

Expand Down Expand Up @@ -19763,7 +19762,7 @@ _ZN5arrow8internal19BaseSetBitRunReaderILb0EE13SkipNextZerosEv.exit: ; preds = %
%86 = and i64 %.0..0..0..0..0..0..i, %85
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)
store i64 %86, ptr %7, align 8, !tbaa !751
%87 = trunc i64 %26 to i32
%87 = trunc nuw nsw i64 %26 to i32
br label %88

88: ; preds = %77, %72
Expand Down Expand Up @@ -19879,7 +19878,7 @@ define linkonce_odr noundef i64 @_ZN5arrow8internal19BaseSetBitRunReaderILb0EE13
%47 = xor i64 %notmask.i.i, -1
%48 = and i64 %.0..0..0..0..0..0..i, %47
call void @llvm.lifetime.end.p0(i64 8, ptr nonnull %2)
%49 = trunc i64 %25 to i32
%49 = trunc nuw nsw i64 %25 to i32
%50 = getelementptr inbounds nuw i8, ptr %0, i64 32
%51 = xor i64 %48, -1
%52 = tail call range(i64 0, 65) i64 @llvm.cttz.i64(i64 %51, i1 true)
Expand Down Expand Up @@ -35142,14 +35141,11 @@ declare i64 @llvm.smin.i64(i64, i64) #24
declare i32 @llvm.smin.i32(i32, i32) #24

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umin.i32(i32, i32) #24
declare i64 @llvm.umin.i64(i64, i64) #24

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite)
declare void @llvm.experimental.noalias.scope.decl(metadata) #25

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umin.i64(i64, i64) #24

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i64 @llvm.umax.i64(i64, i64) #24

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