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Releases: eki-project/finn-plus

v1.4.0

03 Mar 15:22
12fedcd

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New features and changes in this release:

  • Reworked user interface, including settings and dependency management (#118)
  • Reworked PYNQ driver (#100)
  • Integration of experimental ONNX Passes front-end (#116)
  • Improved FPGA-in-the-Loop ("Live") FIFO-Sizing (#158)
  • Rework of Transformer example models and their build flows (#129, #160)
  • Numerous small fixes (#147, #154, #163, #167)
  • Cleanup of numerous dependencies, including a switch to the latest Brevitas (v0.12.1) and QONNX (v1.0.0) releases
  • Marked some redundant CustomOps as deprecated (#166)

Notable features pulled in from the dev branch of AMD's upstream FINN repository:

v1.3.0

09 Dec 15:25
7dd9afe

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New features and improvements:

  • Improved code quality by extending documentation and type hinting (#106)
  • Partially refactored project structure (#113)
  • Removed unneeded dependencies and bump dependency versions (#113)
  • Packaged tests and notebook in separate sub-packages (#113)
  • Added support for arbitrary Reshape operations (#128)
  • Verification: Added configurable tolerance and logging of detailed tensor statistics (#119)

Notable bug fixes:

  • Fix RTL simulation timeout due to small max cycle estimation (#115)
  • Fix OOC synthesis failure for floating point IPs (#122)
  • Fix PE operations assuming identical input and output shapes leading to wrong folding (#128)

v1.2.0

19 Sep 09:49
e4ed1b5

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This release incorporates numerous fixes and improvements from the dev branch of AMD's FINN repository.
These are the most notable features:

  • Improved streamlining transformations to support Split/Concat nodes and the YOLOv8 topology (Xilinx#1189)
  • Added support for MatMul operations with two dynamic inputs to the existing RTL/HLS MVAU operator (Xilinx#1321)
  • Switch to finnxsi as new simulation back-end (Xilinx#1365)
  • Consolidation of the pooling operators into the pool_hls operator (Xilinx#1328)
  • Integration of a new, more generic HLS Upsample operator (Xilinx#1408)
  • Support decoupled mem_mode for elementwise ops (Xilinx#1413)
  • Support FP32 inputs for the Thresholding operator (Xilinx#1418)

v1.1.0

09 Jul 11:25
d7ba129

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New features and improvements:

  • ZYNQ backend: Integration of instrumentation wrapper shell as alternative to I/O DMAs (#45)
  • Introduction of Live (on-board) FIFO-Sizing (#46)
  • Introduction of a custom step library (#34)
  • New optional builder step for Vivado power estimation after OOC synthesis (#82)
  • Alveo C++ driver improvements (#80)
  • Improved error handling and logging
    • Introduce custom exceptions (e.g., "FINNUserError") (#69)
    • Overhauled handling of FINN-launched subprocesses (e.g., Vitis/Vivado) (#34)
    • Dedicated check for unsupported layers after CustomOp mapping (#81, #83)
  • CI-related improvements
    • Infrastructure for on-board regression testing and micro-benchmarking (#34, #82)
    • Stability improvements related to parallel Vitis HLS instances (#79)
    • Build flows for all available finn-examples are now included in FINN+ (#83)

Potentially breaking changes:

  • Removal of oh-my-xilinx dependency, select scripts have been moved to qnn-data/vivado_scripts (#82)
  • Switched synthesis strategies/directives to default for OOC-synth and ZynqBuild (#82)
  • Step for FIFO-sizing/insertion is performed earlier in the flow
  • Changes to data layout inference, which is now performed more often (#87)

Notable updates pulled from upstream FINN:

  • Different input datatypes support for AddStream operator (Xilinx#1195)
  • Introduce FIFO "gauge" mode for depth monitoring during XSI simulation (#75)

v1.0.0

13 May 13:02
5726e01

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Initial FINN+ release. On top of many recent changes from the dev branch of the upstream repository, these are the most notable extensions of FINN included in this release:

  • Completely new containerless setup (replacing the Docker-based infrastructure)
  • Transformer/Attention support
  • Generation of an optimized C++ driver for Alveo platforms
  • Support for host memory access on Alveo platforms
  • Improved streamlining and introduction of a new "StreamlinePlus" transformation
  • Generic elementwise binary operations
  • YAML-based build configuration
  • Extended opset support for the resize operator
  • Improved logging
  • Improved CI and unit test infrastructure