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fixed: #3900 #4452 #4689 stm32 Uart::read_until_idle() #4727

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fixed: #3900 #4452 #4689 stm32 Uart::read_until_idle() #4727

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fan2nd
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@fan2nd fan2nd commented Oct 1, 2025

added: examples/stm32u5/uart.rs
tested on stm32u545re-nucleo

fan added 3 commits October 1, 2025 19:23
lulf
lulf approved these changes Oct 1, 2025
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Great, thanks!

@vDorst
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vDorst commented Oct 2, 2025

Thanks for fixing but I see in my example, that the first read_until_idle() poll always returns Ok(0).
So Zero bytes.

For the rest it works fine.

I also tested the example with the change for an other CPU.
I am using the STM32H573I-DK with a stm32h573ii cpu.
Same issue happens with the example.
First pull return Ok(0) with causes the GDMA code to panic because bytes are 0.

debug log:

0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: M  Programming ✔ 100% [####################]  31.00 KiB @  52.80 KiB/s (took 1s)                                         Finished in 0.78s
0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pl   Finished in 0.78s
0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), p   Finished in 0.78s
0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pcl0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), sys: MaybeHertz(640.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), sys: MaybeHertz(64000000) } (embassy_stm32 src/rcc/mod.rs:71)
beHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHbeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: beHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: May, rtc, rtc: MaybeHer, rtc: MaybeHertz(32000), sys: MaybeHertz(640, rtc: MaybeHertz(32000), sys:, rtc: May, rtc, rtc, rtc: MaybeHertz(32000), sys: MaybeHertz(64000000) } (embassy_stm32 src/rcc/mod.rs:71)
0.000000 [INFO ] Hello World! (uart src/bin/uart.rs:17)
0.000030 [TRACE] USART: Kind::Uart (embassy_stm32 src/usart/mod.rs:1641)
0.000030 [TRACE] USART: presc=1, div=0x0000022c (mantissa = 34, fraction = 12) (embassy_stm32 src/usart/mod.rs:1654)                                                                          
0.000091 [TRACE] Using 16 bit oversampling, desired baudrate: 115200, actual baudrate: 115107 (embassy_stm32 src/usart/mod.rs:1690)
0.000183 [TRACE] USART: m0: 8 data bits, no parity (embassy_stm32 src/usart/mod.rs:1815)
0.000183 [TRACE] USART: set_fifoen: true (usart_v4) (embassy_stm32 src/usart/mod.rs:1875)
0.000305 [INFO ] [] (uart src/bin/uart.rs:23)
0.000335 [ERROR] panicked at 'assertion failed: mem_len > 0 && mem_len <= 0xFFFF' (embassy_stm32 dma/gpdma/mod.rs:612)

Changing the loop to, zero read is catched and the rest works fine.

    match uart.read_until_idle(&mut buffer).await {
        Ok(0) => error!("Zero bytes"),
        Ok(len) => {
            info!("{}", &buffer[0..len]);
            uart.write(&buffer[0..len]).await.unwrap()
        }
        Err(err) => error!("Error: {}", err),
    }

Debug log

0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), sys: MaybeHertz(64000000) } (embassy_stm32 src/rcc/mod.rs:71)
0.000000 [INFO ] Hello World! (uart src/bin/uart.rs:17)
0.000030 [TRACE] USART: Kind::Uart (embassy_stm32 src/usart/mod.rs:1641)
0.000030 [TRACE] USART: presc=1, div=0x0000022c (mantissa = 34, fraction = 12) (embassy_stm32 src/usart/mod.rs:1654)
0.000091 [TRACE] Using 16 bit oversampling, desired baudrate: 115200, actual baudrate: 115107 (embassy_stm32 src/usart/mod.rs:1690)
0.000183 [TRACE] USART: m0: 8 data bits, no parity (embassy_stm32 src/usart/mod.rs:1815)
0.000183 [TRACE] USART: set_fifoen: true (usart_v4) (embassy_stm32 src/usart/mod.rs:1875)
0.000305 [ERROR] Zero bytes (uart src/bin/uart.rs:23)
49.949798 [INFO ] [97] (uart src/bin/uart.rs:25)
50.286712 [INFO ] [97] (uart src/bin/uart.rs:25)
50.460693 [INFO ] [97] (uart src/bin/uart.rs:25)

@fan2nd
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fan2nd commented Oct 2, 2025

Thanks for fixing but I see in my example, that the first read_until_idle() poll always returns Ok(0). So Zero bytes.

For the rest it works fine.

I also tested the example with the change for an other CPU. I am using the STM32H573I-DK with a stm32h573ii cpu. Same issue happens with the example. First pull return Ok(0) with causes the GDMA code to panic because bytes are 0.

debug log:

0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: M  Programming ✔ 100% [####################]  31.00 KiB @  52.80 KiB/s (took 1s)                                         Finished in 0.78s
0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pl   Finished in 0.78s
0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), p   Finished in 0.78s
0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pcl0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), sys: MaybeHertz(640.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), sys: MaybeHertz(64000000) } (embassy_stm32 src/rcc/mod.rs:71)
beHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHbeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: beHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: May, rtc, rtc: MaybeHer, rtc: MaybeHertz(32000), sys: MaybeHertz(640, rtc: MaybeHertz(32000), sys:, rtc: May, rtc, rtc, rtc: MaybeHertz(32000), sys: MaybeHertz(64000000) } (embassy_stm32 src/rcc/mod.rs:71)
0.000000 [INFO ] Hello World! (uart src/bin/uart.rs:17)
0.000030 [TRACE] USART: Kind::Uart (embassy_stm32 src/usart/mod.rs:1641)
0.000030 [TRACE] USART: presc=1, div=0x0000022c (mantissa = 34, fraction = 12) (embassy_stm32 src/usart/mod.rs:1654)                                                                          
0.000091 [TRACE] Using 16 bit oversampling, desired baudrate: 115200, actual baudrate: 115107 (embassy_stm32 src/usart/mod.rs:1690)
0.000183 [TRACE] USART: m0: 8 data bits, no parity (embassy_stm32 src/usart/mod.rs:1815)
0.000183 [TRACE] USART: set_fifoen: true (usart_v4) (embassy_stm32 src/usart/mod.rs:1875)
0.000305 [INFO ] [] (uart src/bin/uart.rs:23)
0.000335 [ERROR] panicked at 'assertion failed: mem_len > 0 && mem_len <= 0xFFFF' (embassy_stm32 dma/gpdma/mod.rs:612)

Changing the loop to, zero read is catched and the rest works fine.

    match uart.read_until_idle(&mut buffer).await {
        Ok(0) => error!("Zero bytes"),
        Ok(len) => {
            info!("{}", &buffer[0..len]);
            uart.write(&buffer[0..len]).await.unwrap()
        }
        Err(err) => error!("Error: {}", err),
    }

Debug log

0.000000 [DEBUG] flash: latency=1 wrhighfreq=0 (embassy_stm32 src/rcc/h.rs:1053)
0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), csi: MaybeHertz(0), hclk1: MaybeHertz(64000000), hclk2: MaybeHertz(64000000), hclk4: MaybeHertz(64000000), hse: MaybeHertz(0), hse_div_rtcpre: MaybeHertz(0), hsi: MaybeHertz(64000000), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(0), pclk1: MaybeHertz(64000000), pclk1_tim: MaybeHertz(64000000), pclk2: MaybeHertz(64000000), pclk2_tim: MaybeHertz(64000000), pclk3: MaybeHertz(64000000), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), sys: MaybeHertz(64000000) } (embassy_stm32 src/rcc/mod.rs:71)
0.000000 [INFO ] Hello World! (uart src/bin/uart.rs:17)
0.000030 [TRACE] USART: Kind::Uart (embassy_stm32 src/usart/mod.rs:1641)
0.000030 [TRACE] USART: presc=1, div=0x0000022c (mantissa = 34, fraction = 12) (embassy_stm32 src/usart/mod.rs:1654)
0.000091 [TRACE] Using 16 bit oversampling, desired baudrate: 115200, actual baudrate: 115107 (embassy_stm32 src/usart/mod.rs:1690)
0.000183 [TRACE] USART: m0: 8 data bits, no parity (embassy_stm32 src/usart/mod.rs:1815)
0.000183 [TRACE] USART: set_fifoen: true (usart_v4) (embassy_stm32 src/usart/mod.rs:1875)
0.000305 [ERROR] Zero bytes (uart src/bin/uart.rs:23)
49.949798 [INFO ] [97] (uart src/bin/uart.rs:25)
50.286712 [INFO ] [97] (uart src/bin/uart.rs:25)
50.460693 [INFO ] [97] (uart src/bin/uart.rs:25)

I don't have h5 devices and i am unable to reproduce this issue on u5.

@vDorst
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vDorst commented Oct 2, 2025

I also have a STM32U5G9J-DK1 which sporadically show a zero byte in between.
In this log example it was the first but that is not the default.

0.000000 [TRACE] BDCR configured: 00008200 (embassy_stm32 src/rcc/bd.rs:285)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), dsi_phy: MaybeHertz(0), hclk1: MaybeHertz(4000000), hclk2: MaybeHertz(4000000), hclk3: MaybeHertz(4000000), hse: MaybeHertz(0), hsi: MaybeHertz(0), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(32000), msik: MaybeHertz(4000000), pclk1: MaybeHertz(4000000), pclk1_tim: MaybeHertz(4000000), pclk2: MaybeHertz(4000000), pclk2_tim: MaybeHertz(4000000), pclk3: MaybeHertz(4000000), pll1_p: MaybeHertz(0), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), shsi: MaybeHertz(0), sys: MaybeHertz(4000000) } (embassy_stm32 src/rcc/mod.rs:71)
0.000061 [INFO ] Hello World! (uart src/bin/uart.rs:17)
0.000518 [TRACE] USART: Kind::Uart (embassy_stm32 src/usart/mod.rs:1641)
0.000854 [TRACE] USART: presc=1, div=0x00000023 (mantissa = 2, fraction = 3) (embassy_stm32 src/usart/mod.rs:1654)
0.001800 [TRACE] Using 16 bit oversampling, desired baudrate: 115200, actual baudrate: 114285 (embassy_stm32 src/usart/mod.rs:1690)  
0.003021 [TRACE] USART: m0: 8 data bits, no parity (embassy_stm32 src/usart/mod.rs:1815)
0.003326 [TRACE] USART: set_fifoen: true (usart_v4) (embassy_stm32 src/usart/mod.rs:1875)
53.035766 [ERROR] Zero bytes (uart src/bin/uart.rs:23)
53.845764 [INFO ] [97] (uart src/bin/uart.rs:25)
53.973846 [INFO ] [100] (uart src/bin/uart.rs:25)
54.152099 [INFO ] [97] (uart src/bin/uart.rs:25)
54.168487 [INFO ] [115] (uart src/bin/uart.rs:25)
54.231506 [INFO ] [100] (uart src/bin/uart.rs:25)
54.344512 [INFO ] [97, 115] (uart src/bin/uart.rs:25)

This one after 44 sec.

0.000000 [TRACE] BDCR ok: 0c008200 (embassy_stm32 src/rcc/bd.rs:221)
0.000000 [DEBUG] rcc: Clocks { audioclk: MaybeHertz(0), dsi_phy: MaybeHertz(0), hclk1: MaybeHertz(4000000), hclk2: MaybeHertz(4000000), hclk3: MaybeHertz(4000000), hse: MaybeHertz(0), hsi: MaybeHertz(0), hsi48: MaybeHertz(48000000), lse: MaybeHertz(0), lsi: MaybeHertz(32000), msik: MaybeHertz(4000000), pclk1: MaybeHertz(4000000), pclk1_tim: MaybeHertz(4000000), pclk2: MaybeHertz(4000000), pclk2_tim: MaybeHertz(4000000), pclk3: MaybeHertz(4000000), pll1_p: MaybeHertz(0), pll1_q: MaybeHertz(0), pll2_p: MaybeHertz(0), pll2_q: MaybeHertz(0), pll2_r: MaybeHertz(0), pll3_p: MaybeHertz(0), pll3_q: MaybeHertz(0), pll3_r: MaybeHertz(0), rtc: MaybeHertz(32000), shsi: MaybeHertz(0), sys: MaybeHertz(4000000) } (embassy_stm32 src/rcc/mod.rs:71)
0.000061 [INFO ] Hello World! (uart src/bin/uart.rs:17)
0.000518 [TRACE] USART: Kind::Uart (embassy_stm32 src/usart/mod.rs:1641)
0.000854 [TRACE] USART: presc=1, div=0x00000023 (mantissa = 2, fraction = 3) (embassy_stm32 src/usart/mod.rs:1654)
0.001831 [TRACE] Using 16 bit oversampling, desired baudrate: 115200, actual baudrate: 114285 (embassy_stm32 src/usart/mod.rs:1690)  
0.003021 [TRACE] USART: m0: 8 data bits, no parity (embassy_stm32 src/usart/mod.rs:1815)
0.003356 [TRACE] USART: set_fifoen: true (usart_v4) (embassy_stm32 src/usart/mod.rs:1875)
3.814819 [INFO ] [97] (uart src/bin/uart.rs:25)
3.847045 [INFO ] [115] (uart src/bin/uart.rs:25)
3.895263 [INFO ] [100] (uart src/bin/uart.rs:25)
3.943817 [INFO ] [102] (uart src/bin/uart.rs:25)
4.057556 [INFO ] [97] (uart src/bin/uart.rs:25)
4.072631 [INFO ] [115] (uart src/bin/uart.rs:25)
4.089202 [INFO ] [100] (uart src/bin/uart.rs:25)
4.137023 [INFO ] [102] (uart src/bin/uart.rs:25)
4.249816 [INFO ] [100, 115] (uart src/bin/uart.rs:25)
4.314422 [INFO ] [102] (uart src/bin/uart.rs:25)
4.378479 [INFO ] [97] (uart src/bin/uart.rs:25)
4.443145 [INFO ] [100, 115] (uart src/bin/uart.rs:25)
4.476226 [INFO ] [102] (uart src/bin/uart.rs:25)
4.588500 [INFO ] [115] (uart src/bin/uart.rs:25)
4.668792 [INFO ] [102] (uart src/bin/uart.rs:25)
4.847045 [INFO ] [97] (uart src/bin/uart.rs:25)
4.848754 [INFO ] [115] (uart src/bin/uart.rs:25)
4.926483 [INFO ] [102] (uart src/bin/uart.rs:25)
5.071746 [INFO ] [97, 100, 115] (uart src/bin/uart.rs:25)
5.119506 [INFO ] [108] (uart src/bin/uart.rs:25)
5.136077 [INFO ] [102] (uart src/bin/uart.rs:25)
5.168670 [INFO ] [107] (uart src/bin/uart.rs:25)
5.265869 [INFO ] [100] (uart src/bin/uart.rs:25)
5.298522 [INFO ] [108, 115] (uart src/bin/uart.rs:25)
5.345550 [INFO ] [102] (uart src/bin/uart.rs:25)
5.361602 [INFO ] [107] (uart src/bin/uart.rs:25)
5.570861 [INFO ] [102] (uart src/bin/uart.rs:25)
5.635192 [INFO ] [97] (uart src/bin/uart.rs:25)
5.749359 [INFO ] [39] (uart src/bin/uart.rs:25)
5.764587 [INFO ] [59, 107] (uart src/bin/uart.rs:25)
5.910644 [INFO ] [97, 108, 100] (uart src/bin/uart.rs:25)
5.958190 [INFO ] [59, 107] (uart src/bin/uart.rs:25)
5.973602 [INFO ] [102] (uart src/bin/uart.rs:25)
6.055053 [INFO ] [59] (uart src/bin/uart.rs:25)
6.135742 [INFO ] [195, 161, 108] (uart src/bin/uart.rs:25)
6.138031 [INFO ] [115] (uart src/bin/uart.rs:25)
6.166656 [INFO ] [107] (uart src/bin/uart.rs:25)
6.199127 [INFO ] [102] (uart src/bin/uart.rs:25)
6.362152 [INFO ] [106] (uart src/bin/uart.rs:25)
6.376159 [INFO ] [102] (uart src/bin/uart.rs:25)
6.505340 [INFO ] [57, 105, 52] (uart src/bin/uart.rs:25)
6.635223 [INFO ] [106] (uart src/bin/uart.rs:25)
6.667510 [INFO ] [102] (uart src/bin/uart.rs:25)
6.763183 [INFO ] [57, 50] (uart src/bin/uart.rs:25)
6.827178 [INFO ] [51] (uart src/bin/uart.rs:25)
7.038726 [INFO ] [117] (uart src/bin/uart.rs:25)
7.040435 [INFO ] [106, 102, 100] (uart src/bin/uart.rs:25)
7.182861 [INFO ] [106] (uart src/bin/uart.rs:25)
7.214324 [INFO ] [105] (uart src/bin/uart.rs:25)
7.230285 [INFO ] [119] (uart src/bin/uart.rs:25)
7.247253 [INFO ] [97] (uart src/bin/uart.rs:25)
7.455627 [INFO ] [51, 50] (uart src/bin/uart.rs:25)
7.503845 [INFO ] [57, 48] (uart src/bin/uart.rs:25)
7.618225 [INFO ] [117] (uart src/bin/uart.rs:25)
7.730163 [INFO ] [57] (uart src/bin/uart.rs:25)
7.842803 [INFO ] [106] (uart src/bin/uart.rs:25)
7.954956 [INFO ] [105] (uart src/bin/uart.rs:25)
7.970947 [INFO ] [111] (uart src/bin/uart.rs:25)
8.035766 [INFO ] [106] (uart src/bin/uart.rs:25)
8.068023 [INFO ] [102] (uart src/bin/uart.rs:25)
8.213439 [INFO ] [108] (uart src/bin/uart.rs:25)
8.277343 [INFO ] [115] (uart src/bin/uart.rs:25)
8.310211 [INFO ] [106] (uart src/bin/uart.rs:25)
8.325805 [INFO ] [97] (uart src/bin/uart.rs:25)
8.455230 [INFO ] [102] (uart src/bin/uart.rs:25)
8.551116 [INFO ] [97, 57] (uart src/bin/uart.rs:25)
8.615417 [INFO ] [115] (uart src/bin/uart.rs:25)
8.745513 [INFO ] [102] (uart src/bin/uart.rs:25)
8.858001 [INFO ] [100] (uart src/bin/uart.rs:25)
8.890869 [INFO ] [106] (uart src/bin/uart.rs:25)
8.922698 [INFO ] [107] (uart src/bin/uart.rs:25)
8.970062 [INFO ] [102] (uart src/bin/uart.rs:25)
9.050964 [INFO ] [106] (uart src/bin/uart.rs:25)
9.099517 [INFO ] [97, 115] (uart src/bin/uart.rs:25)
9.131347 [INFO ] [108] (uart src/bin/uart.rs:25)
9.147003 [INFO ] [59] (uart src/bin/uart.rs:25)
9.228454 [INFO ] [110, 109] (uart src/bin/uart.rs:25)
9.275787 [INFO ] [102] (uart src/bin/uart.rs:25)
9.308624 [INFO ] [59] (uart src/bin/uart.rs:25)
9.340576 [INFO ] [108] (uart src/bin/uart.rs:25)
9.356903 [INFO ] [107] (uart src/bin/uart.rs:25)
9.438659 [INFO ] [100] (uart src/bin/uart.rs:25)
9.440338 [INFO ] [115] (uart src/bin/uart.rs:25)
9.453491 [INFO ] [110, 109] (uart src/bin/uart.rs:25)
9.535064 [INFO ] [102] (uart src/bin/uart.rs:25)
9.662567 [INFO ] [32] (uart src/bin/uart.rs:25)
9.678741 [INFO ] [115] (uart src/bin/uart.rs:25)
9.694671 [INFO ] [97] (uart src/bin/uart.rs:25)
9.791687 [INFO ] [100, 13] (uart src/bin/uart.rs:25)
9.823852 [INFO ] [102] (uart src/bin/uart.rs:25)
9.937103 [INFO ] [97, 100, 115, 13] (uart src/bin/uart.rs:25)
10.001739 [INFO ] [102] (uart src/bin/uart.rs:25)
10.148071 [INFO ] [97] (uart src/bin/uart.rs:25)
10.162292 [INFO ] [115, 59] (uart src/bin/uart.rs:25)
10.227203 [INFO ] [102] (uart src/bin/uart.rs:25)
10.355468 [INFO ] [59] (uart src/bin/uart.rs:25)
10.452331 [INFO ] [108] (uart src/bin/uart.rs:25)
10.662353 [INFO ] [32] (uart src/bin/uart.rs:25)
10.856109 [INFO ] [59] (uart src/bin/uart.rs:25)
11.032226 [INFO ] [97] (uart src/bin/uart.rs:25)
11.580169 [INFO ] [97] (uart src/bin/uart.rs:25)
11.612487 [INFO ] [59] (uart src/bin/uart.rs:25)
11.708831 [INFO ] [115] (uart src/bin/uart.rs:25)
11.805694 [INFO ] [100] (uart src/bin/uart.rs:25)
11.951232 [INFO ] [97] (uart src/bin/uart.rs:25)
11.966552 [INFO ] [115] (uart src/bin/uart.rs:25)
12.595611 [INFO ] [115] (uart src/bin/uart.rs:25)
12.708099 [INFO ] [107] (uart src/bin/uart.rs:25)
12.739715 [INFO ] [100] (uart src/bin/uart.rs:25)
12.755859 [INFO ] [97] (uart src/bin/uart.rs:25)
12.804138 [INFO ] [115] (uart src/bin/uart.rs:25)
12.917144 [INFO ] [106] (uart src/bin/uart.rs:25)
13.111145 [INFO ] [50] (uart src/bin/uart.rs:25)
13.126464 [INFO ] [57] (uart src/bin/uart.rs:25)
13.239685 [INFO ] [49] (uart src/bin/uart.rs:25)
13.288116 [INFO ] [48] (uart src/bin/uart.rs:25)
13.496948 [INFO ] [49] (uart src/bin/uart.rs:25)
13.513366 [INFO ] [45] (uart src/bin/uart.rs:25)
13.691528 [INFO ] [45] (uart src/bin/uart.rs:25)
13.932708 [INFO ] [96] (uart src/bin/uart.rs:25)
14.109497 [INFO ] [48, 105] (uart src/bin/uart.rs:25)
14.126007 [INFO ] [51] (uart src/bin/uart.rs:25)
14.464782 [INFO ] [115] (uart src/bin/uart.rs:25)
14.608734 [INFO ] [100] (uart src/bin/uart.rs:25)
14.867431 [INFO ] [107] (uart src/bin/uart.rs:25)
14.947906 [INFO ] [97] (uart src/bin/uart.rs:25)
14.949371 [INFO ] [115] (uart src/bin/uart.rs:25)
15.011535 [INFO ] [106] (uart src/bin/uart.rs:25)
15.109588 [INFO ] [108] (uart src/bin/uart.rs:25)
15.204833 [INFO ] [59, 107, 115] (uart src/bin/uart.rs:25)
15.236999 [INFO ] [100] (uart src/bin/uart.rs:25)
15.334533 [INFO ] [102] (uart src/bin/uart.rs:25)
15.366485 [INFO ] [107] (uart src/bin/uart.rs:25)
15.464172 [INFO ] [100] (uart src/bin/uart.rs:25)
15.559844 [INFO ] [102] (uart src/bin/uart.rs:25)
15.575378 [INFO ] [108] (uart src/bin/uart.rs:25)
15.607788 [INFO ] [107] (uart src/bin/uart.rs:25)
15.673919 [INFO ] [97] (uart src/bin/uart.rs:25)
15.768920 [INFO ] [115, 102] (uart src/bin/uart.rs:25)
15.802062 [INFO ] [108, 107] (uart src/bin/uart.rs:25)
15.883087 [INFO ] [106] (uart src/bin/uart.rs:25)
15.913909 [INFO ] [100] (uart src/bin/uart.rs:25)
16.011108 [INFO ] [108] (uart src/bin/uart.rs:25)
16.042816 [INFO ] [102, 106] (uart src/bin/uart.rs:25)
16.123840 [INFO ] [97] (uart src/bin/uart.rs:25)
16.139251 [INFO ] [115] (uart src/bin/uart.rs:25)
16.158172 [INFO ] [108] (uart src/bin/uart.rs:25)
16.188262 [INFO ] [100] (uart src/bin/uart.rs:25)
16.253204 [INFO ] [106] (uart src/bin/uart.rs:25)
16.256195 [INFO ] [102] (uart src/bin/uart.rs:25)
16.365325 [INFO ] [97, 108, 107, 115, 59] (uart src/bin/uart.rs:25)
16.397003 [INFO ] [100] (uart src/bin/uart.rs:25)
16.445648 [INFO ] [106, 102] (uart src/bin/uart.rs:25)
16.526245 [INFO ] [97] (uart src/bin/uart.rs:25)
16.542449 [INFO ] [108] (uart src/bin/uart.rs:25)
16.574615 [INFO ] [107, 115, 59] (uart src/bin/uart.rs:25)
16.606597 [INFO ] [100] (uart src/bin/uart.rs:25)
16.639770 [INFO ] [106] (uart src/bin/uart.rs:25)
16.655395 [INFO ] [102] (uart src/bin/uart.rs:25)
16.736938 [INFO ] [108] (uart src/bin/uart.rs:25)
16.768890 [INFO ] [97, 107, 115] (uart src/bin/uart.rs:25)
16.833435 [INFO ] [106] (uart src/bin/uart.rs:25)
16.864227 [INFO ] [102] (uart src/bin/uart.rs:25)
16.945922 [INFO ] [108] (uart src/bin/uart.rs:25)
16.960571 [INFO ] [107] (uart src/bin/uart.rs:25)
17.026397 [INFO ] [106, 100, 115] (uart src/bin/uart.rs:25)
17.089843 [INFO ] [102] (uart src/bin/uart.rs:25)
17.140014 [INFO ] [108] (uart src/bin/uart.rs:25)
17.170623 [INFO ] [107] (uart src/bin/uart.rs:25)
17.236480 [INFO ] [97] (uart src/bin/uart.rs:25)
17.315551 [INFO ] [108, 59] (uart src/bin/uart.rs:25)
17.347808 [INFO ] [107] (uart src/bin/uart.rs:25)
17.379852 [INFO ] [115] (uart src/bin/uart.rs:25)
17.429534 [INFO ] [106] (uart src/bin/uart.rs:25)
17.478179 [INFO ] [102] (uart src/bin/uart.rs:25)
17.524993 [INFO ] [108, 107, 59] (uart src/bin/uart.rs:25)
17.621643 [INFO ] [97, 106, 115] (uart src/bin/uart.rs:25)
17.670074 [INFO ] [100] (uart src/bin/uart.rs:25)
17.702514 [INFO ] [108, 59] (uart src/bin/uart.rs:25)
17.734802 [INFO ] [107, 102] (uart src/bin/uart.rs:25)
17.750396 [INFO ] [106] (uart src/bin/uart.rs:25)
17.896728 [INFO ] [97] (uart src/bin/uart.rs:25)
17.928588 [INFO ] [108, 107, 100] (uart src/bin/uart.rs:25)
17.993713 [INFO ] [106] (uart src/bin/uart.rs:25)
18.104797 [INFO ] [108] (uart src/bin/uart.rs:25)
18.120758 [INFO ] [107] (uart src/bin/uart.rs:25)
18.136779 [INFO ] [115] (uart src/bin/uart.rs:25)
18.185394 [INFO ] [97, 106, 100] (uart src/bin/uart.rs:25)
18.250366 [INFO ] [108, 102] (uart src/bin/uart.rs:25)
18.282073 [INFO ] [107, 59] (uart src/bin/uart.rs:25)
18.429046 [INFO ] [97] (uart src/bin/uart.rs:25)
18.430816 [INFO ] [106, 100, 115] (uart src/bin/uart.rs:25)
18.459350 [INFO ] [32] (uart src/bin/uart.rs:25)
18.556030 [INFO ] [108] (uart src/bin/uart.rs:25)
18.621398 [INFO ] [107] (uart src/bin/uart.rs:25)
18.669097 [INFO ] [106, 100, 115] (uart src/bin/uart.rs:25)
18.750274 [INFO ] [102] (uart src/bin/uart.rs:25)
18.781433 [INFO ] [108, 107] (uart src/bin/uart.rs:25)
18.910827 [INFO ] [106] (uart src/bin/uart.rs:25)
18.912506 [INFO ] [100] (uart src/bin/uart.rs:25)
18.926330 [INFO ] [115] (uart src/bin/uart.rs:25)
19.024261 [INFO ] [32] (uart src/bin/uart.rs:25)
19.039428 [INFO ] [108] (uart src/bin/uart.rs:25)
19.120513 [INFO ] [106] (uart src/bin/uart.rs:25)
19.313293 [INFO ] [108, 107, 120] (uart src/bin/uart.rs:25)
19.475097 [INFO ] [99] (uart src/bin/uart.rs:25)
19.636596 [INFO ] [46] (uart src/bin/uart.rs:25)
19.638366 [INFO ] [44] (uart src/bin/uart.rs:25)
19.667510 [INFO ] [120] (uart src/bin/uart.rs:25)
19.683471 [INFO ] [122] (uart src/bin/uart.rs:25)
19.765045 [INFO ] [109] (uart src/bin/uart.rs:25)
19.893096 [INFO ] [46] (uart src/bin/uart.rs:25)
19.908905 [INFO ] [44] (uart src/bin/uart.rs:25)
19.925506 [INFO ] [122] (uart src/bin/uart.rs:25)
20.005737 [INFO ] [109] (uart src/bin/uart.rs:25)
20.070068 [INFO ] [99] (uart src/bin/uart.rs:25)
20.135467 [INFO ] [46] (uart src/bin/uart.rs:25)
20.264831 [INFO ] [109] (uart src/bin/uart.rs:25)
20.344940 [INFO ] [99] (uart src/bin/uart.rs:25)
20.377166 [INFO ] [44] (uart src/bin/uart.rs:25)
20.474395 [INFO ] [109] (uart src/bin/uart.rs:25)
20.489074 [INFO ] [122, 46] (uart src/bin/uart.rs:25)
20.553466 [INFO ] [44] (uart src/bin/uart.rs:25)
20.585449 [INFO ] [99] (uart src/bin/uart.rs:25)
20.618041 [INFO ] [109] (uart src/bin/uart.rs:25)
20.666564 [INFO ] [122] (uart src/bin/uart.rs:25)
20.715454 [INFO ] [46, 120] (uart src/bin/uart.rs:25)
20.730926 [INFO ] [44] (uart src/bin/uart.rs:25)
20.813140 [INFO ] [109] (uart src/bin/uart.rs:25)
20.892425 [INFO ] [46] (uart src/bin/uart.rs:25)
20.908233 [INFO ] [44] (uart src/bin/uart.rs:25)
20.991210 [INFO ] [109] (uart src/bin/uart.rs:25)
21.036804 [INFO ] [46] (uart src/bin/uart.rs:25)
21.085723 [INFO ] [122] (uart src/bin/uart.rs:25)
21.101470 [INFO ] [44] (uart src/bin/uart.rs:25)
21.150207 [INFO ] [99] (uart src/bin/uart.rs:25)
21.165618 [INFO ] [109] (uart src/bin/uart.rs:25)
21.278900 [INFO ] [122, 46] (uart src/bin/uart.rs:25)
21.359466 [INFO ] [120, 109] (uart src/bin/uart.rs:25)
21.455596 [INFO ] [46] (uart src/bin/uart.rs:25)
21.472229 [INFO ] [122] (uart src/bin/uart.rs:25)
21.522613 [INFO ] [120, 99] (uart src/bin/uart.rs:25)
21.552398 [INFO ] [109] (uart src/bin/uart.rs:25)
21.601440 [INFO ] [46] (uart src/bin/uart.rs:25)
21.633850 [INFO ] [122] (uart src/bin/uart.rs:25)
21.681488 [INFO ] [120, 99] (uart src/bin/uart.rs:25)
21.729980 [INFO ] [109] (uart src/bin/uart.rs:25)
21.794250 [INFO ] [46, 120] (uart src/bin/uart.rs:25)
21.809967 [INFO ] [44] (uart src/bin/uart.rs:25)
21.842163 [INFO ] [99] (uart src/bin/uart.rs:25)
21.923553 [INFO ] [109] (uart src/bin/uart.rs:25)
22.003662 [INFO ] [46] (uart src/bin/uart.rs:25)
22.019805 [INFO ] [44] (uart src/bin/uart.rs:25)
22.133392 [INFO ] [115] (uart src/bin/uart.rs:25)
22.148620 [INFO ] [100] (uart src/bin/uart.rs:25)
22.244964 [INFO ] [100] (uart src/bin/uart.rs:25)
22.406127 [INFO ] [97] (uart src/bin/uart.rs:25)
22.454925 [INFO ] [108, 107] (uart src/bin/uart.rs:25)
22.553802 [INFO ] [100] (uart src/bin/uart.rs:25)
22.681152 [INFO ] [97, 108] (uart src/bin/uart.rs:25)
22.682342 [INFO ] [59] (uart src/bin/uart.rs:25)
22.779083 [INFO ] [100] (uart src/bin/uart.rs:25)
22.873992 [INFO ] [97] (uart src/bin/uart.rs:25)
22.954193 [INFO ] [115] (uart src/bin/uart.rs:25)
23.034362 [INFO ] [100] (uart src/bin/uart.rs:25)
23.131866 [INFO ] [115] (uart src/bin/uart.rs:25)
23.163635 [INFO ] [97] (uart src/bin/uart.rs:25)
23.325683 [INFO ] [102] (uart src/bin/uart.rs:25)
23.470458 [INFO ] [107] (uart src/bin/uart.rs:25)
23.534606 [INFO ] [106] (uart src/bin/uart.rs:25)
23.549957 [INFO ] [102] (uart src/bin/uart.rs:25)
23.696105 [INFO ] [107] (uart src/bin/uart.rs:25)
23.711486 [INFO ] [100] (uart src/bin/uart.rs:25)
23.744995 [INFO ] [97] (uart src/bin/uart.rs:25)
23.808074 [INFO ] [102] (uart src/bin/uart.rs:25)
23.889007 [INFO ] [107] (uart src/bin/uart.rs:25)
23.906127 [INFO ] [108] (uart src/bin/uart.rs:25)
23.938354 [INFO ] [115] (uart src/bin/uart.rs:25)
23.953369 [INFO ] [97] (uart src/bin/uart.rs:25)
23.985534 [INFO ] [100] (uart src/bin/uart.rs:25)
24.001464 [INFO ] [106] (uart src/bin/uart.rs:25)
24.050231 [INFO ] [102] (uart src/bin/uart.rs:25)
24.066497 [INFO ] [59] (uart src/bin/uart.rs:25)
24.081878 [INFO ] [108] (uart src/bin/uart.rs:25)
24.162963 [INFO ] [97] (uart src/bin/uart.rs:25)
24.194580 [INFO ] [106, 115] (uart src/bin/uart.rs:25)
24.242706 [INFO ] [100] (uart src/bin/uart.rs:25)
24.308197 [INFO ] [108] (uart src/bin/uart.rs:25)
24.309967 [INFO ] [107] (uart src/bin/uart.rs:25)
24.323303 [INFO ] [102] (uart src/bin/uart.rs:25)
24.388305 [INFO ] [106] (uart src/bin/uart.rs:25)
24.517547 [INFO ] [108, 59] (uart src/bin/uart.rs:25)
24.549652 [INFO ] [97, 107, 115] (uart src/bin/uart.rs:25)
24.630035 [INFO ] [106, 100] (uart src/bin/uart.rs:25)
24.693756 [INFO ] [102] (uart src/bin/uart.rs:25)
24.759216 [INFO ] [107] (uart src/bin/uart.rs:25)
24.775024 [INFO ] [108] (uart src/bin/uart.rs:25)
24.855377 [INFO ] [106, 115] (uart src/bin/uart.rs:25)
24.952911 [INFO ] [108] (uart src/bin/uart.rs:25)
24.954376 [INFO ] [100] (uart src/bin/uart.rs:25)
24.984222 [INFO ] [107] (uart src/bin/uart.rs:25)
25.065948 [INFO ] [106] (uart src/bin/uart.rs:25)
25.080963 [INFO ] [102] (uart src/bin/uart.rs:25)
25.161712 [INFO ] [108] (uart src/bin/uart.rs:25)
25.177581 [INFO ] [107] (uart src/bin/uart.rs:25)
25.210113 [INFO ] [100, 115] (uart src/bin/uart.rs:25)
25.307128 [INFO ] [106, 102] (uart src/bin/uart.rs:25)
25.402923 [INFO ] [108] (uart src/bin/uart.rs:25)
25.418762 [INFO ] [107] (uart src/bin/uart.rs:25)
25.467590 [INFO ] [115] (uart src/bin/uart.rs:25)
25.499481 [INFO ] [100] (uart src/bin/uart.rs:25)
25.533142 [INFO ] [106] (uart src/bin/uart.rs:25)
25.629425 [INFO ] [108] (uart src/bin/uart.rs:25)
25.676940 [INFO ] [107] (uart src/bin/uart.rs:25)
25.710601 [INFO ] [115] (uart src/bin/uart.rs:25)
25.773651 [INFO ] [106] (uart src/bin/uart.rs:25)
25.839508 [INFO ] [108, 100] (uart src/bin/uart.rs:25)
25.951629 [INFO ] [102] (uart src/bin/uart.rs:25)
25.982849 [INFO ] [106] (uart src/bin/uart.rs:25)
26.096893 [INFO ] [100] (uart src/bin/uart.rs:25)
26.128631 [INFO ] [107] (uart src/bin/uart.rs:25)
26.144775 [INFO ] [102] (uart src/bin/uart.rs:25)
26.176177 [INFO ] [106] (uart src/bin/uart.rs:25)
26.289276 [INFO ] [108, 107] (uart src/bin/uart.rs:25)
26.304901 [INFO ] [115] (uart src/bin/uart.rs:25)
26.337860 [INFO ] [100] (uart src/bin/uart.rs:25)
26.435333 [INFO ] [106] (uart src/bin/uart.rs:25)
26.466339 [INFO ] [102] (uart src/bin/uart.rs:25)
26.514648 [INFO ] [108] (uart src/bin/uart.rs:25)
26.546691 [INFO ] [107] (uart src/bin/uart.rs:25)
26.643737 [INFO ] [106] (uart src/bin/uart.rs:25)
26.756805 [INFO ] [108] (uart src/bin/uart.rs:25)
26.788452 [INFO ] [107] (uart src/bin/uart.rs:25)
26.901550 [INFO ] [100] (uart src/bin/uart.rs:25)
26.933654 [INFO ] [106] (uart src/bin/uart.rs:25)
27.078430 [INFO ] [108] (uart src/bin/uart.rs:25)
27.094451 [INFO ] [107, 102] (uart src/bin/uart.rs:25)
27.160156 [INFO ] [115] (uart src/bin/uart.rs:25)
27.174774 [INFO ] [100] (uart src/bin/uart.rs:25)
27.239990 [INFO ] [106] (uart src/bin/uart.rs:25)
27.387115 [INFO ] [108] (uart src/bin/uart.rs:25)
27.497650 [INFO ] [102, 106] (uart src/bin/uart.rs:25)
27.595062 [INFO ] [101] (uart src/bin/uart.rs:25)
27.658630 [INFO ] [105] (uart src/bin/uart.rs:25)
27.835571 [INFO ] [111] (uart src/bin/uart.rs:25)
27.982299 [INFO ] [106] (uart src/bin/uart.rs:25)
28.061431 [INFO ] [115] (uart src/bin/uart.rs:25)
28.158294 [INFO ] [111] (uart src/bin/uart.rs:25)
28.286743 [INFO ] [106] (uart src/bin/uart.rs:25)
28.415557 [INFO ] [108, 107, 100] (uart src/bin/uart.rs:25)
28.529144 [INFO ] [102] (uart src/bin/uart.rs:25)
28.561157 [INFO ] [106] (uart src/bin/uart.rs:25)
28.609130 [INFO ] [97] (uart src/bin/uart.rs:25)
28.625305 [INFO ] [59] (uart src/bin/uart.rs:25)
28.803497 [INFO ] [100] (uart src/bin/uart.rs:25)
28.805023 [INFO ] [115] (uart src/bin/uart.rs:25)
28.850555 [INFO ] [107] (uart src/bin/uart.rs:25)
28.963714 [INFO ] [97] (uart src/bin/uart.rs:25)
29.027709 [INFO ] [108, 59] (uart src/bin/uart.rs:25)
29.076354 [INFO ] [115] (uart src/bin/uart.rs:25)
29.142120 [INFO ] [100] (uart src/bin/uart.rs:25)
29.157226 [INFO ] [106] (uart src/bin/uart.rs:25)
29.189697 [INFO ] [102] (uart src/bin/uart.rs:25)
29.286102 [INFO ] [107] (uart src/bin/uart.rs:25)
29.317901 [INFO ] [97] (uart src/bin/uart.rs:25)
29.351257 [INFO ] [115] (uart src/bin/uart.rs:25)
29.414489 [INFO ] [100] (uart src/bin/uart.rs:25)
29.462890 [INFO ] [108] (uart src/bin/uart.rs:25)
29.494903 [INFO ] [102] (uart src/bin/uart.rs:25)
29.591674 [INFO ] [106] (uart src/bin/uart.rs:25)
29.690124 [INFO ] [108] (uart src/bin/uart.rs:25)
29.704437 [INFO ] [107] (uart src/bin/uart.rs:25)
29.720458 [INFO ] [100] (uart src/bin/uart.rs:25)
29.818756 [INFO ] [106] (uart src/bin/uart.rs:25)
29.898559 [INFO ] [108] (uart src/bin/uart.rs:25)
29.946228 [INFO ] [59] (uart src/bin/uart.rs:25)
29.962341 [INFO ] [107] (uart src/bin/uart.rs:25)
29.980407 [INFO ] [115] (uart src/bin/uart.rs:25)
30.075042 [INFO ] [106] (uart src/bin/uart.rs:25)
30.155395 [INFO ] [102] (uart src/bin/uart.rs:25)
30.171356 [INFO ] [108] (uart src/bin/uart.rs:25)
30.187438 [INFO ] [107] (uart src/bin/uart.rs:25)
30.268341 [INFO ] [115] (uart src/bin/uart.rs:25)
30.300720 [INFO ] [106] (uart src/bin/uart.rs:25)
30.415161 [INFO ] [108] (uart src/bin/uart.rs:25)
30.528228 [INFO ] [106] (uart src/bin/uart.rs:25)
30.559143 [INFO ] [115] (uart src/bin/uart.rs:25)
30.639343 [INFO ] [108] (uart src/bin/uart.rs:25)
30.655059 [INFO ] [100, 59] (uart src/bin/uart.rs:25)
30.736297 [INFO ] [106, 102] (uart src/bin/uart.rs:25)
30.864807 [INFO ] [108] (uart src/bin/uart.rs:25)
30.880767 [INFO ] [107] (uart src/bin/uart.rs:25)
30.944854 [INFO ] [115] (uart src/bin/uart.rs:25)
30.977294 [INFO ] [106, 100] (uart src/bin/uart.rs:25)
31.219787 [INFO ] [57] (uart src/bin/uart.rs:25)
31.283416 [INFO ] [101] (uart src/bin/uart.rs:25)
31.412200 [INFO ] [119] (uart src/bin/uart.rs:25)
31.460906 [INFO ] [111] (uart src/bin/uart.rs:25)
31.606811 [INFO ] [106] (uart src/bin/uart.rs:25)
31.718933 [INFO ] [97, 115] (uart src/bin/uart.rs:25)
31.751220 [INFO ] [100] (uart src/bin/uart.rs:25)
31.863311 [INFO ] [102] (uart src/bin/uart.rs:25)
31.879333 [INFO ] [59] (uart src/bin/uart.rs:25)
32.008453 [INFO ] [106, 100, 115] (uart src/bin/uart.rs:25)
32.138183 [INFO ] [107] (uart src/bin/uart.rs:25)
32.234069 [INFO ] [106, 102] (uart src/bin/uart.rs:25)
32.443603 [INFO ] [106, 115] (uart src/bin/uart.rs:25)
32.573181 [INFO ] [102] (uart src/bin/uart.rs:25)
32.604644 [INFO ] [100] (uart src/bin/uart.rs:25)
32.636718 [INFO ] [107] (uart src/bin/uart.rs:25)
32.685607 [INFO ] [106, 102] (uart src/bin/uart.rs:25)
32.798614 [INFO ] [59] (uart src/bin/uart.rs:25)
32.830688 [INFO ] [97] (uart src/bin/uart.rs:25)
32.846160 [INFO ] [115] (uart src/bin/uart.rs:25)
32.878479 [INFO ] [106] (uart src/bin/uart.rs:25)
32.942993 [INFO ] [100] (uart src/bin/uart.rs:25)
33.024200 [INFO ] [108, 107, 102] (uart src/bin/uart.rs:25)
33.168273 [INFO ] [97, 115] (uart src/bin/uart.rs:25)
33.216644 [INFO ] [108, 106, 100] (uart src/bin/uart.rs:25)
41.094665 [INFO ] [97, 115] (uart src/bin/uart.rs:25)
41.256744 [INFO ] [100] (uart src/bin/uart.rs:25)
41.304809 [INFO ] [102] (uart src/bin/uart.rs:25)
41.530059 [INFO ] [97] (uart src/bin/uart.rs:25)
41.545562 [INFO ] [100] (uart src/bin/uart.rs:25)
41.626434 [INFO ] [102] (uart src/bin/uart.rs:25)
41.788360 [INFO ] [97, 115] (uart src/bin/uart.rs:25)
41.867919 [INFO ] [102] (uart src/bin/uart.rs:25)
42.012725 [INFO ] [115] (uart src/bin/uart.rs:25)
42.093170 [INFO ] [102] (uart src/bin/uart.rs:25)
42.206115 [INFO ] [115] (uart src/bin/uart.rs:25)
42.239562 [INFO ] [97] (uart src/bin/uart.rs:25)
42.303161 [INFO ] [102] (uart src/bin/uart.rs:25)
42.399383 [INFO ] [97] (uart src/bin/uart.rs:25)
42.431518 [INFO ] [115] (uart src/bin/uart.rs:25)
42.545318 [INFO ] [102] (uart src/bin/uart.rs:25)
42.786590 [INFO ] [51] (uart src/bin/uart.rs:25)
43.077178 [INFO ] [102] (uart src/bin/uart.rs:25)
43.447662 [INFO ] [51] (uart src/bin/uart.rs:25)
43.721282 [INFO ] [52] (uart src/bin/uart.rs:25)
43.785644 [INFO ] [103] (uart src/bin/uart.rs:25)
44.092254 [INFO ] [102] (uart src/bin/uart.rs:25)
44.093566 [ERROR] Zero bytes (uart src/bin/uart.rs:23)
44.156127 [INFO ] [103] (uart src/bin/uart.rs:25)
44.268859 [INFO ] [97] (uart src/bin/uart.rs:25)
44.284454 [INFO ] [115] (uart src/bin/uart.rs:25)
44.332916 [INFO ] [100] (uart src/bin/uart.rs:25)
44.397766 [INFO ] [102] (uart src/bin/uart.rs:25)

I am just using Putty and just random typing quickly.

@fan2nd
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fan2nd commented Oct 2, 2025 •
edited
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This maybe caused by noise. Ok(0) is acceptable if there is no data error(loss or repetition or other). And this can be solved in user code.

@vDorst
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vDorst commented Oct 6, 2025

It is fine for now. My application is currently not in the proper state to test this properly.
So, if I find something or hit other issues I shall made a new issue.

About the example: Why not printing the error in the error path?

@fan2nd
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fan2nd commented Oct 6, 2025

I noticed there is request_pause() called in Drop of Transfer which is the same as the code i added. But the code i added is indeed effective. I don't know why. I tried to fix this bug through other ways but failed.

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@fan2nd @vDorst @lulf