Refine SVE2 Gemm32fNT zero init and Kernel6x4nt A/B order - #828
Merged
Conversation
Initialize accumulators from const svfloat32_t zero = svdup_n_f32(0.0f). In Kernel6x4nt, load B rows first and use svmla(c, b, a) to reduce register pressure versus holding six A vectors. Co-authored-by: Ihar Yermalayeu <ermig1979@gmail.com>
Reuse the existing a0 register when processing the second F-wide chunk inside the DF unrolled loop. Co-authored-by: Ihar Yermalayeu <ermig1979@gmail.com>
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
2 participants
Add this suggestion to a batch that can be applied as a single commit.This suggestion is invalid because no changes were made to the code.Suggestions cannot be applied while the pull request is closed.Suggestions cannot be applied while viewing a subset of changes.Only one suggestion per line can be applied in a batch.Add this suggestion to a batch that can be applied as a single commit.Applying suggestions on deleted lines is not supported.You must change the existing code in this line in order to create a valid suggestion.Outdated suggestions cannot be applied.This suggestion has been applied or marked resolved.Suggestions cannot be applied from pending reviews.Suggestions cannot be applied on multi-line comments.Suggestions cannot be applied while the pull request is queued to merge.Suggestion cannot be applied right now. Please check back later.
Summary
Further refines ARM SVE/SVE2 optimizations of
SimdGemm32fNTinSimdSve2Gemm32fNT.cppon top of #827.Changes
const svfloat32_t zero = svdup_n_f32(0.0f);.Kernel6x4nt: load the four B rows first, then stream A rows, usingsvmla(c, b, a)to cut register pressure versus holding six A vectors.Validation
./Test "-r=.." -fi=Gemm32fNT -tt=1 -ts=1— passed.-DSIMD_SVE2=ON:SimdSve2Gemm32fNT.cppcompiles;Simd::Sve2::Gemm32fNTlinked inlibSimd.so.-cpu max,sve=on, VL=512):Gemm32fNTAutoTest passed for Base/NEON/SVE2.