feat(USB-OTG): Add USB-OTG CDC RX/TX support

CMakeLists.txt

@@ -23,6 +23,7 @@ set(srcs
     src/security.c
     src/uart.c
     src/usb_serial_jtag.c
+    src/usb_otg.c
 )
 
 if(STUB_LOG_ENABLED IN_LIST STUB_COMPILE_DEFS)

include/esp-stub-lib/usb_otg.h

@@ -0,0 +1,79 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0 OR MIT
+ */
+
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif // __cplusplus
+
+/**
+ * @brief Check if USB-OTG is currently being used for communication
+ *
+ * This function checks if the ROM has initialized USB-OTG as the communication
+ * interface instead of UART.
+ *
+ * @return true if USB-OTG is active, false otherwise
+ */
+bool stub_lib_usb_otg_is_active(void);
+
+/**
+ * @brief Initialize USB-OTG for communication
+ *
+ * This function sets up USB-OTG interrupts and the RX callback function.
+ * It should be called after ROM initialization if USB-OTG is detected.
+ *
+ * @param intr_num Interrupt number
+ * @param rx_callback Callback function to be called when data is received
+ *                    The callback receives a single byte as parameter
+ */
+void stub_lib_usb_otg_rominit_intr_attach(int intr_num, void (*rx_callback)(uint8_t));
+
+/**
+ * @brief Transmit a single byte over USB-OTG
+ *
+ * @param c Byte to transmit
+ * @return 0 if successful, non-zero if error occurred
+ */
+uint8_t stub_lib_usb_otg_tx_one_char(uint8_t c);
+
+/**
+ * @brief Flush any buffered USB-OTG transmit data
+ */
+void stub_lib_usb_otg_tx_flush(void);
+
+/**
+ * @brief Enable or disable USB-OTG RX interrupts
+ *
+ * @param enable true to enable, false to disable
+ */
+void stub_lib_usb_otg_rx_async_enable(bool enable);
+
+/**
+ * @brief Check if USB-OTG reset was requested via RTS line
+ *
+ * This function checks if the host has requested a reset by toggling RTS.
+ * If reset is requested, the function returns true and should be followed
+ * by calling stub_lib_usb_otg_handle_reset().
+ *
+ * @return true if reset was requested, false otherwise
+ */
+bool stub_lib_usb_otg_is_reset_requested(void);
+
+/**
+ * @brief Handle USB-OTG reset request
+ *
+ * This function performs the necessary cleanup and prepares for reset.
+ * It should be called when stub_lib_usb_otg_is_reset_requested() returns true.
+ */
+void stub_lib_usb_otg_handle_reset(void);
+
+#ifdef __cplusplus
+}
+#endif // __cplusplus

src/target/base/include/target/usb_otg.h

@@ -0,0 +1,33 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0 OR MIT
+ */
+
+#pragma once
+
+#include <stdbool.h>
+
+/**
+ * @brief Check if USB-OTG is supported on this chip
+ *
+ * @return true if USB-OTG is supported, false otherwise
+ */
+bool stub_target_usb_otg_is_supported(void);
+
+/**
+ * @brief Initialize USB-OTG for communication
+ *
+ * This function sets up USB-OTG interrupts and the callback function.
+ *
+ * @param intr_num Interrupt number
+ * @param callback Callback function to be called when data is received
+ */
+void stub_target_usb_otg_rominit_intr_attach(int intr_num, void *callback);
+
+/**
+ * @brief Handle USB-OTG reset request
+ *
+ * This function performs the necessary cleanup and performs a software reset.
+ */
+void stub_target_usb_otg_handle_reset(void);

src/target/common/CMakeLists.txt

@@ -4,6 +4,7 @@ set(common_srcs
     src/security.c
     src/uart.c
     src/usb_serial_jtag.c
+    src/usb_otg.c
 )
 
 add_library(${ESP_COMMON_LIB} STATIC ${common_srcs})

src/target/common/src/usb_otg.c

@@ -0,0 +1,25 @@
+/*
+ * SPDX-FileCopyrightText: 2025 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0 OR MIT
+ */
+
+#include <stdbool.h>
+#include <stdint.h>
+#include <target/usb_otg.h>
+
+// Weak implementations for chips that don't support USB-OTG
+bool __attribute__((weak)) stub_target_usb_otg_is_supported(void)
+{
+    return false;
+}
+
+void __attribute__((weak)) stub_target_usb_otg_rominit_intr_attach(int intr_num, void *callback)
+{
+    (void)callback;
+    (void)intr_num;
+}
+
+void __attribute__((weak)) stub_target_usb_otg_handle_reset(void)
+{
+}

src/target/esp32c3/ld/esp32c3.rom.api.ld

@@ -49,6 +49,7 @@ PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
 PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );

src/target/esp32c3/src/usb_serial_jtag.c

@@ -15,7 +15,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -26,7 +26,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTERRUPT_CORE0_USB_INTR_MAP_REG, intr_num);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32c5/ld/esp32c5.rom.api.ld

@@ -55,6 +55,7 @@ PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
 PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );

src/target/esp32c5/src/usb_serial_jtag.c

@@ -16,7 +16,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -27,7 +27,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTERRUPT_CORE0_USB_SERIAL_JTAG_INTR_MAP_REG, intr_num + CLIC_EXT_INTR_NUM_OFFSET);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32c6/ld/esp32c6.rom.api.ld

@@ -53,6 +53,7 @@ PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
 PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );

src/target/esp32c6/src/usb_serial_jtag.c

@@ -15,7 +15,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -26,7 +26,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTMTX_CORE0_USB_INTR_MAP_REG, intr_num);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32c61/ld/esp32c61.rom.api.ld

@@ -51,6 +51,7 @@ PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );

src/target/esp32c61/src/usb_serial_jtag.c

@@ -16,7 +16,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -27,7 +27,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTERRUPT_CORE0_USB_INTR_MAP_REG, intr_num + CLIC_EXT_INTR_NUM_OFFSET);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32h2/ld/esp32h2.rom.api.ld

@@ -52,6 +52,7 @@ PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );

src/target/esp32h2/src/usb_serial_jtag.c

@@ -15,7 +15,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -26,7 +26,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTMTX_CORE0_USB_INTR_MAP_REG, intr_num);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32h21/ld/esp32h21.rom.api.ld

@@ -51,6 +51,7 @@ PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );

src/target/esp32h21/src/usb_serial_jtag.c

@@ -15,7 +15,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -26,7 +26,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTMTX_CORE0_USB_INTR_MAP_REG, intr_num);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32h4/ld/esp32h4.rom.api.ld

@@ -53,6 +53,7 @@ PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
 PROVIDE ( esp_rom_delay_us = ets_delay_us );
 PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
 PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
+PROVIDE ( esp_rom_esprv_intc_int_set_priority = esprv_intc_int_set_priority );
 PROVIDE ( esp_rom_isr_attach = ets_isr_attach );
 PROVIDE ( esp_rom_isr_unmask = ets_isr_unmask );
 PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );

src/target/esp32h4/src/usb_serial_jtag.c

@@ -16,7 +16,7 @@
 // External ROM functions
 extern void esp_rom_isr_attach(int int_num, void *handler, void *arg);
 extern void esp_rom_isr_unmask(int int_num);
-extern void esprv_intc_int_set_priority(int int_num, int priority);
+extern void esp_rom_esprv_intc_int_set_priority(int int_num, int priority);
 
 bool stub_target_usb_serial_jtag_is_supported(void)
 {
@@ -27,7 +27,7 @@ void stub_target_usb_serial_jtag_rominit_intr_attach(int intr_num, void *handler
 {
     // Route USB interrupt to CPU
     WRITE_PERI_REG(INTERRUPT_CORE0_USB_SERIAL_JTAG_INTR_MAP_REG(0), intr_num + CLIC_EXT_INTR_NUM_OFFSET);
-    esprv_intc_int_set_priority(intr_num, 1);
+    esp_rom_esprv_intc_int_set_priority(intr_num, 1);
 
     // Clear pending interrupt flags
     WRITE_PERI_REG(USB_SERIAL_JTAG_INT_CLR_REG, 0xFFFFFFFFU);

src/target/esp32p4/CMakeLists.txt

@@ -1,6 +1,7 @@
 set(srcs
     src/uart.c
     src/usb_serial_jtag.c
+    src/usb_otg.c
 )
 
 add_library(${ESP_TARGET_LIB} STATIC ${srcs})