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Wire 512-bit QBS kernels into fast scan DD dispatch#5075

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algoriddle wants to merge 1 commit intofacebookresearch:mainfrom
algoriddle:export-D100151879
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Wire 512-bit QBS kernels into fast scan DD dispatch#5075
algoriddle wants to merge 1 commit intofacebookresearch:mainfrom
algoriddle:export-D100151879

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Summary:
In DD mode, the QBS (bbs=32) accumulate path always used 256-bit kernels,
even in the AVX512 per-ISA TU. The 512-bit kernels in kernels_simd512.h
were dead because bare simdlib aliases resolve to _tpl in DD mode,
and 512-bit NONE types don't exist (empty primary templates).

Fix: add function-local using declarations in both 512-bit kernel functions
to bind types to explicit AVX512/AVX2 levels. Create accumulate_loops_512.h
with FixedStorage512 (a non-virtual intermediate handler that bridges the
AVX2→NONE type gap via storeu/loadu at the handler boundary) and the 512-bit
QBS accumulate loop. Wire it into dispatching.h's ScannerMixIn behind an

Differential Revision: D100151879

Summary:
In DD mode, the QBS (bbs=32) accumulate path always used 256-bit kernels,
even in the AVX512 per-ISA TU. The 512-bit kernels in kernels_simd512.h
were dead because bare simdlib aliases resolve to _tpl<NONE> in DD mode,
and 512-bit NONE types don't exist (empty primary templates).

Fix: add function-local using declarations in both 512-bit kernel functions
to bind types to explicit AVX512/AVX2 levels. Create accumulate_loops_512.h
with FixedStorage512 (a non-virtual intermediate handler that bridges the
AVX2→NONE type gap via storeu/loadu at the handler boundary) and the 512-bit
QBS accumulate loop. Wire it into dispatching.h's ScannerMixIn behind an

Differential Revision: D100151879
@meta-cla meta-cla bot added the CLA Signed label Apr 10, 2026
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meta-codesync bot commented Apr 10, 2026

@algoriddle has exported this pull request. If you are a Meta employee, you can view the originating Diff in D100151879.

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