add intel scalable thru emerald rapids and xeon 6#918
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chillenb wants to merge 3 commits intoflame:masterfrom
Open
add intel scalable thru emerald rapids and xeon 6#918chillenb wants to merge 3 commits intoflame:masterfrom
chillenb wants to merge 3 commits intoflame:masterfrom
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Author
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It might be good to return 2 for unknown Xeon cpus with avx512, and add exceptions over time, rather than return -1 by default. |
Member
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Agree on defaulting to 2. I drove the decision to have 2 in all ICX SKUs and it seemed like this would hold in future products, although I left the company in 2021 and ceased to have any involvement in this topic. |
Member
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Cross reference with https://github.com/jeffhammond/vpu-count. 5122 has 2 FMAs in it, not that it really matters. |
Author
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Thanks for your help! (fortunately the 5122 was already handled on line 988) |
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This is an attempt to add the scalable Xeon chips through Emerald Rapids to bli_cpuid.h in order to fix #917.
Some of the silver models in newer generations have 2 vpus, so I had to adjust the logic a little.
I also tried to add the Xeon 6 series, which all have 2 vpus except for 6300--6399. I'm assuming that the model strings don't have a separate "6" in them, i.e. "Intel(R) Xeon(R) 6740E Processor" and not "Intel(R) Xeon(R) 6 6740E Processor". These are distinguished from gold CPUs with overlapping sku ranges by the absence of precious metals.