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make hls/ip_handler pass csim + fixing create_project functionality #17

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make hls/ip_handler pass csim + fixing create_project functionality #17

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15f754b
add ip_handler_top decl in header and rename the test file to force m…
vkhristenko Jan 27, 2020
d425d12
update gitignore
vkhristenko Mar 4, 2020
4449fdc
fix create_project functionality
vkhristenko Mar 5, 2020
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1 change: 1 addition & 0 deletions .gitignore
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Expand Up @@ -52,3 +52,4 @@ synth/
*.csv
*.out

iprepo/
20 changes: 20 additions & 0 deletions CMakeLists.txt
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Expand Up @@ -84,3 +84,23 @@ add_subdirectory(hls/hash_table)
if (NOT hasParent)
add_subdirectory(hls/ethernet_frame_padding)
endif()

if (NOT hasParent)

# Find Xilinx Vivado
find_package(Vivado REQUIRED)
if (NOT VIVADO_FOUND)
message(FATAL_ERROR "Vivado not found.")
endif()

configure_file(${CMAKE_SOURCE_DIR}/scripts/create_project.tcl.in create_project.tcl)

#set (PROJECT_DEPENDS
# ${CMAKE_SOURCE_DIR}/rtl/common/network_stack.v
# ${CMAKE_SOURCE_DIR}/projects/create_project.tcl.in
# ${CMAKE_SOURCE_DIR}/projects/network_stack.tcl)

add_custom_target(project
COMMAND ${VIVADO_BINARY} -mode batch -source create_project.tcl)
#DEPENDS ${PROJECT_DEPENDS})
endif()
10 changes: 10 additions & 0 deletions hls/ip_handler/ip_handler.hpp
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Expand Up @@ -47,3 +47,13 @@ void ip_handler(hls::stream<net_axis<WIDTH> >& s_axis_raw,
hls::stream<net_axis<WIDTH> >& m_axis_ROCE,
ap_uint<32> myIpAddress);

void ip_handler_top(
hls::stream<net_axis<DATA_WIDTH> >& s_axis_raw,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_arp,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_icmpv6,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_ipv6udp,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_icmp,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_udp,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_tcp,
hls::stream<net_axis<DATA_WIDTH> >& m_axis_roce,
ap_uint<32> myIpAddress);
51 changes: 51 additions & 0 deletions hls/ip_handler/newtcp.in
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0a 00 ab 89 67 45 23 01 ff 0
00 45 00 08 e5 9d 02 35 ff 0
01 40 00 40 00 00 54 00 ff 0
01 01 0a 01 01 01 9d 36 ff 0
b4 63 b7 c0 00 00 01 01 ff 0
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01 01 0a 01 01 01 9d 36 ff 0
b4 63 b7 c0 00 00 01 01 ff 0
00 00 51 cd 55 b8 01 00 ff 0
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1d 1c 1b 1a 19 18 17 16 ff 0
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2d 2c 2b 2a 29 28 27 26 ff 0
35 34 33 32 31 30 2f 2e ff 0
00 00 00 00 00 00 37 36 03 1
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23 56 2c df cd 2b 0a 01 ff 0
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0a 00 69 9a 45 dd 60 00 ff 0
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23 56 2c df cd 2b 0a 01 ff 0
11 50 d3 b8 71 9b c0 01 ff 0
00 00 00 00 a5 f4 fe ff 3f 1
0a 00 69 9a 45 dd 60 00 ff 0
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01 01 01 01 01 01 b5 76 ff 0
23 56 c1 ab cd 2b 0a 01 ff 0
10 50 a9 d8 87 4b b1 01 ff 0
48 0e 00 00 5c f9 ff ff ff 0
6c 65 4d 20 6f 6c 6c 65 ff 0
00 00 00 2e 72 65 78 65 1f 1
2 changes: 1 addition & 1 deletion scripts/axi_infrastructure.tcl
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Expand Up @@ -2,7 +2,7 @@

#FIFOs

create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version 1.1 -module_name axis_data_fifo_64_cc -dir $device_ip_dir
create_ip -name axis_data_fifo -vendor xilinx.com -library ip -version * -module_name axis_data_fifo_64_cc -dir $device_ip_dir
set_property -dict [list CONFIG.TDATA_NUM_BYTES {8} CONFIG.IS_ACLK_ASYNC {1} CONFIG.HAS_TKEEP {1} CONFIG.HAS_TLAST {1} CONFIG.SYNCHRONIZATION_STAGES {3} CONFIG.Component_Name {axis_data_fifo_64_cc}] [get_ips axis_data_fifo_64_cc]
generate_target {instantiation_template} [get_files $device_ip_dir/axis_data_fifo_64_cc/axis_data_fifo_64_cc.xci]
update_compile_order -fileset sources_1
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16 changes: 8 additions & 8 deletions scripts/create_project.tcl.in
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@@ -1,7 +1,7 @@
set proj_name "network_stack_example_prj"
set root_dir [pwd]
set proj_dir $root_dir/$proj_name
set src_dir $root_dir/../rtl
set src_dir $root_dir/../hdl
set ip_dir $root_dir/../ip
set ip_repo $root_dir/../iprepo
set constraints_dir $root_dir/../constraints
Expand All @@ -14,7 +14,7 @@ if { [file isdirectory $ip_repo] } {
exit 1
}
# Create project
create_project $proj_name $proj_dir
create_project -force $proj_name $proj_dir

# Set project properties
set obj [get_projects $proj_name]
Expand Down Expand Up @@ -42,19 +42,19 @@ set device_ip_dir $ip_dir/${DEVICE_NAME}
#Create IPs

#Network interface
source ${CMAKE_SOURCE_DIR}/projects/network_${FPGA_FAMILY}.tcl
source ${CMAKE_SOURCE_DIR}/scripts/network_${FPGA_FAMILY}.tcl

#AXI Infrastructure: FIFOs, Register slices, Interconnect
source ${CMAKE_SOURCE_DIR}/projects/axi_infrastructure.tcl
source ${CMAKE_SOURCE_DIR}/scripts/axi_infrastructure.tcl

#Network stack
source ${CMAKE_SOURCE_DIR}/projects/network_stack.tcl
source ${CMAKE_SOURCE_DIR}/scripts/network_stack.tcl

#VIOs
source ${CMAKE_SOURCE_DIR}/projects/common.tcl
source ${CMAKE_SOURCE_DIR}/scripts/common.tcl

#Memory interface
source ${CMAKE_SOURCE_DIR}/projects/dram_${FPGA_FAMILY}.tcl
source ${CMAKE_SOURCE_DIR}/scripts/dram_${FPGA_FAMILY}.tcl


start_gui
#start_gui
5 changes: 4 additions & 1 deletion scripts/create_vcu118_proj.tcl
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@@ -1,11 +1,14 @@
set proj_name "tcp_ip_vcu118"
set root_dir [pwd]
set proj_dir $root_dir/$proj_name
set src_dir $root_dir/../rtl
set src_dir $root_dir/../hdl
set ip_dir $root_dir/../ip
set ip_repo $root_dir/../iprepo
set constraints_dir $root_dir/../constraints

puts "root_dir = $root_dir"
puts "ip_repo = $ip_repo"

#Check if iprepo is available
if { [file isdirectory $ip_repo] } {
set lib_dir "$ip_repo"
Expand Down
16 changes: 8 additions & 8 deletions scripts/network_stack.tcl
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Expand Up @@ -36,15 +36,15 @@ set_property -dict [list CONFIG.Component_Name {axis_interconnect_merger_160} CO
generate_target {instantiation_template} [get_files $device_ip_dir/axis_interconnect_merger_160/axis_interconnect_merger_160.xci]
update_compile_order -fileset sources_1

create_ip -name axis_interconnect -vendor xilinx.com -library ip -version 1.1 -module_name axis_interconnect_2to1 -dir $device_ip_dir
set_property -dict [list CONFIG.C_NUM_SI_SLOTS {2} CONFIG.SWITCH_TDATA_NUM_BYTES {8} CONFIG.HAS_TSTRB {false} CONFIG.HAS_TID {false} CONFIG.HAS_TDEST {false} CONFIG.SWITCH_PACKET_MODE {true} CONFIG.C_SWITCH_MAX_XFERS_PER_ARB {0} CONFIG.C_M00_AXIS_REG_CONFIG {1} CONFIG.C_S00_AXIS_REG_CONFIG {1} CONFIG.C_S01_AXIS_REG_CONFIG {1} CONFIG.C_SWITCH_NUM_CYCLES_TIMEOUT {0} CONFIG.M00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S01_AXIS_TDATA_NUM_BYTES {8} CONFIG.M00_S01_CONNECTIVITY {true}] [get_ips axis_interconnect_2to1]
generate_target {instantiation_template} [get_files $device_ip_dir/axis_interconnect_2to1/axis_interconnect_2to1.xci]
update_compile_order -fileset sources_1
#create_ip -name axis_interconnect -vendor xilinx.com -library ip -version 1.1 -module_name axis_interconnect_2to1 -dir $device_ip_dir
#set_property -dict [list CONFIG.C_NUM_SI_SLOTS {2} CONFIG.SWITCH_TDATA_NUM_BYTES {8} CONFIG.HAS_TSTRB {false} CONFIG.HAS_TID {false} CONFIG.HAS_TDEST {false} CONFIG.SWITCH_PACKET_MODE {true} CONFIG.C_SWITCH_MAX_XFERS_PER_ARB {0} CONFIG.C_M00_AXIS_REG_CONFIG {1} CONFIG.C_S00_AXIS_REG_CONFIG {1} CONFIG.C_S01_AXIS_REG_CONFIG {1} CONFIG.C_SWITCH_NUM_CYCLES_TIMEOUT {0} CONFIG.M00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S01_AXIS_TDATA_NUM_BYTES {8} CONFIG.M00_S01_CONNECTIVITY {true}] [get_ips axis_interconnect_2to1]
#generate_target {instantiation_template} [get_files $device_ip_dir/axis_interconnect_2to1/axis_interconnect_2to1.xci]
#update_compile_order -fileset sources_1

create_ip -name axis_interconnect -vendor xilinx.com -library ip -version 1.1 -module_name axis_interconnect_3to1 -dir $device_ip_dir
set_property -dict [list CONFIG.C_NUM_SI_SLOTS {3} CONFIG.SWITCH_TDATA_NUM_BYTES {8} CONFIG.HAS_TSTRB {false} CONFIG.HAS_TID {false} CONFIG.HAS_TDEST {false} CONFIG.SWITCH_PACKET_MODE {true} CONFIG.C_S00_AXIS_REG_CONFIG {1} CONFIG.C_S01_AXIS_REG_CONFIG {1} CONFIG.C_S02_AXIS_REG_CONFIG {1} CONFIG.C_SWITCH_MAX_XFERS_PER_ARB {0} CONFIG.C_SWITCH_NUM_CYCLES_TIMEOUT {0} CONFIG.M00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S01_AXIS_TDATA_NUM_BYTES {8} CONFIG.S02_AXIS_TDATA_NUM_BYTES {8} CONFIG.M00_S01_CONNECTIVITY {true} CONFIG.M00_S02_CONNECTIVITY {true}] [get_ips axis_interconnect_3to1]
generate_target {instantiation_template} [get_files $device_ip_dir/axis_interconnect_3to1/axis_interconnect_3to1.xci]
update_compile_order -fileset sources_1
#create_ip -name axis_interconnect -vendor xilinx.com -library ip -version 1.1 -module_name axis_interconnect_3to1 -dir $device_ip_dir
#set_property -dict [list CONFIG.C_NUM_SI_SLOTS {3} CONFIG.SWITCH_TDATA_NUM_BYTES {8} CONFIG.HAS_TSTRB {false} CONFIG.HAS_TID {false} CONFIG.HAS_TDEST {false} CONFIG.SWITCH_PACKET_MODE {true} CONFIG.C_S00_AXIS_REG_CONFIG {1} CONFIG.C_S01_AXIS_REG_CONFIG {1} CONFIG.C_S02_AXIS_REG_CONFIG {1} CONFIG.C_SWITCH_MAX_XFERS_PER_ARB {0} CONFIG.C_SWITCH_NUM_CYCLES_TIMEOUT {0} CONFIG.M00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S01_AXIS_TDATA_NUM_BYTES {8} CONFIG.S02_AXIS_TDATA_NUM_BYTES {8} CONFIG.M00_S01_CONNECTIVITY {true} CONFIG.M00_S02_CONNECTIVITY {true}] [get_ips axis_interconnect_3to1]
#generate_target {instantiation_template} [get_files $device_ip_dir/axis_interconnect_3to1/axis_interconnect_3to1.xci]
#update_compile_order -fileset sources_1

create_ip -name axis_interconnect -vendor xilinx.com -library ip -version 1.1 -module_name axis_interconnect_4to1 -dir $device_ip_dir
set_property -dict [list CONFIG.C_NUM_SI_SLOTS {4} CONFIG.SWITCH_TDATA_NUM_BYTES {8} CONFIG.HAS_TSTRB {false} CONFIG.HAS_TID {false} CONFIG.HAS_TDEST {false} CONFIG.SWITCH_PACKET_MODE {true} CONFIG.C_SWITCH_MAX_XFERS_PER_ARB {0} CONFIG.C_M00_AXIS_REG_CONFIG {1} CONFIG.C_S00_AXIS_REG_CONFIG {1} CONFIG.C_S01_AXIS_REG_CONFIG {1} CONFIG.C_S02_AXIS_REG_CONFIG {1} CONFIG.C_S03_AXIS_REG_CONFIG {1} CONFIG.C_SWITCH_NUM_CYCLES_TIMEOUT {0} CONFIG.M00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S00_AXIS_TDATA_NUM_BYTES {8} CONFIG.S01_AXIS_TDATA_NUM_BYTES {8} CONFIG.S02_AXIS_TDATA_NUM_BYTES {8} CONFIG.S03_AXIS_TDATA_NUM_BYTES {8} CONFIG.M00_S01_CONNECTIVITY {true} CONFIG.M00_S02_CONNECTIVITY {true} CONFIG.M00_S03_CONNECTIVITY {true}] [get_ips axis_interconnect_4to1]
Expand Down
2 changes: 1 addition & 1 deletion scripts/network_ultraplus.tcl
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@@ -1,6 +1,6 @@
#Network interface

create_ip -name xxv_ethernet -vendor xilinx.com -library ip -version 2.4 -module_name ethernet_10g_ip -dir $device_ip_dir
create_ip -name xxv_ethernet -vendor xilinx.com -library ip -version * -module_name ethernet_10g_ip -dir $device_ip_dir
set_property -dict [list CONFIG.LINE_RATE {10} CONFIG.NUM_OF_CORES {1} CONFIG.INCLUDE_AXI4_INTERFACE {0} CONFIG.GT_REF_CLK_FREQ {161.1328125} CONFIG.GT_DRP_CLK {125} CONFIG.GT_GROUP_SELECT {Quad_X1Y12} CONFIG.LANE1_GT_LOC {X1Y48} CONFIG.ENABLE_PIPELINE_REG {1} CONFIG.Component_Name {ethernet_10g_ip}] [get_ips ethernet_10g_ip]
generate_target {instantiation_template} [get_files $device_ip_dir/ethernet_10g_ip/ethernet_10g_ip.xci]
update_compile_order -fileset sources_1
Expand Down