rk_typec_phy: add USB-C DisplayPort altmode bring-up for RK3399

[b1nc0d3x]

Summary

sys/arm64/rockchip/rk_typec_phy.c (Vadot, 2019) brings the RK3399
Type-C combo PHY up in USB 3.0 SuperSpeed mode only. The PHY is a
4-lane combo block that can also be muxed for DisplayPort in any of
the standard Type-C pin assignments (C, D, E, F), with two or four
lanes of DP signaling alongside zero or two lanes of USB3. Adding
DP-altmode support here is the prerequisite for the Cadence MHDP
DPTX driver (next review) to drive a USB-C DisplayPort sink on
RockPro64, Pinebook Pro, and other RK3399 boards.

What this patch adds

• DP altmode phynode operations (set_mode(DP), set_mode(USB),
  set_mode(USB+DP) for 2+2 pin assignments).
• Lane swap selection driven by FUSB302 CC1/CC2 orientation
  detection, routed through the rk3399 fusb302 helper.
• Pin-assignment table: C_E (4-lane DP), D_F (2-lane DP + 2-lane
  USB3). Selected by the consumer driver based on the DP
  partner's VDM Discover_Modes response.
• Combo PHY PLL reprogram for HBR (2.7 Gbps) and RBR (1.62 Gbps).
  HBR2 (5.4 Gbps) reserved for follow-up — the PLL recipe is not
  in the Rockchip 4.4 BSP.
• Link training state hand-off API exposed to the cdn-dp consumer:
  enter DP altmode, wait for PHY A0_READY, signal lane status to
  DPTX firmware.
• Sysctl tunables for forcing pin assignment, lane swap, AUX
  polarity — bring-up only; default is autodetect.
• Per-instance debug flag dev.rk_typec_phy.<N>.debug, default 0.

What this patch does NOT add

• The MHDP DPTX driver — this patch brings the PHY up to A0_READY;
  DPTX firmware boot + link training is the next review.
• HBR2 / HBR3 link rates — no public PLL recipe; limited to HBR.
• USB4 / Thunderbolt — not supported by the RK3399 combo PHY.

Authorship

The original rk_typec_phy.c USB-only path (2019) is by Emmanuel Vadot
manu@FreeBSD.org. The DP-altmode additions in this patch were
written by Kyle Crenshaw on top of Manu's USB scaffold and the
Rockchip 4.4 BSP for PHY register sequencing. Manu's BSD-2
copyright header is preserved verbatim; a second copyright line is
added for the new contribution.

Dependencies

Depends on the fusb302 / rk3399_fusb302_helper work currently in
PR #2211 (D3 / D4). Reviewers can build this branch in isolation
(the helper symbols resolve at runtime), but a working DP link
requires the fusb302-side patches.

Test plan

• RockPro64 v2.1 + XYM W156F1 portable USB-C monitor:
  • PHY transitions A3→A0 within ~100 ms of phynode_set_mode(DP).
  • Lane swap follows CC orientation (cable in either slot works).
  • Pin assignment C (4-lane DP) and D (2-lane DP + USB3) both
    reach A0_READY.
  • HBR (2.7 Gbps) achieves clock-recovery + EQ on both DP lanes;
    verified via cdn-dp DPCD readback after link training.
• Same board, USB-only mode: PHY stays in SuperSpeed; no
  regression versus the upstream Vadot driver.
• kldload rk_typec_phy ; kldunload rk_typec_phy cycle in both
  DP-attached and USB-only modes: all PLL registers return to
  reset values on unload, no leaks.
• Forced pin-assignment override via
  dev.rk_typec_phy.0.force_pin_assign=C: link still trains at
  HBR; verifies the assignment is actually selected (not just
  autodetect winning the same way).

Suggested reviewers

Per recent committers to sys/arm64/rockchip/:

• @manu (original rk_typec_phy.c author, most active in this dir)
• @bsdimp (recent rockchip + drm2 review activity)
• @mhorne61 (recent rockchip review on D1)
• @mmel-FreeBSD (rockchip PHY/clock background)

Subscribers: freebsd-arm, freebsd-x11

[github-actions]

Thank you for taking the time to contribute to FreeBSD!

Some of files have special handling:

Important

@evadot wants to review changes to sys/arm64/rockchip