Provide access to the larger SPI flash on Praline

[martinling]

The original 8Mbit/1MB SPI flash size is hardcoded in the firmware, libhackrf and hackrf_spiflash, which prevents use of the rest of the 32Mbit/4MB flash on Praline.

This PR does the following:

1. Makes the firmware aware of the increased num_pages and num_bytes when built with PRALINE defined.
2. Makes hackrf_spiflash check the board ID, and apply a 4MB rather than 1MB limit for BOARD_ID_PRALINE.
3. Updates the argument range checks in libhackrf to fail only if (address + length) > 0x400000.

I have gone for the simplest set of changes here rather than trying to generalise to any future hardware.

[mossmann]

Nice! Thank you!