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Merged
hackenbergstefan merged 1 commit into from
Dec 15, 2025
Merged

format #11

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2 changes: 1 addition & 1 deletion Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

[package]
name = "rainbow-rs"
version = "0.6.1"
version = "0.6.2"
edition = "2021"

[dependencies]
Expand Down
3 changes: 1 addition & 2 deletions src/lib.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -25,7 +25,6 @@ use unicorn_engine::{
RegisterARM, Unicorn,
};


use asmutils::{ElfInfo, Segment, SideChannelOperandsValues};
use communication::{Communication, SimpleSerial};
use error::{CapstoneError, UcError};
Expand Down Expand Up @@ -54,7 +53,7 @@ pub struct ScaData<'a> {
pub instruction: &'a OwnedInsn<'static>,
pub registers: &'a Vec<ArmOperand>,
pub regvalues_before: ArrayVec<u64, 16>,
pub regvalues_after: ArrayVec<u64,16>,
pub regvalues_after: ArrayVec<u64, 16>,
pub cache_updates:
ArrayVec<([u8; MAX_BUS_SIZE], [u8; MAX_BUS_SIZE]), MAX_MEMORY_UPDATES_PER_INSTRUCTION>,
pub bus_updates:
Expand Down
4 changes: 2 additions & 2 deletions src/memory_extension.rs
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Expand Up @@ -182,7 +182,7 @@ impl MemoryExtension for CacheLruWriteThrough {
memory_before: [u8; MAX_BUS_SIZE],
memory_after: [u8; MAX_BUS_SIZE],
) {
assert!((address as usize % self.bus_size) == 0);
assert!((address as usize).is_multiple_of(self.bus_size));
// Check if address is in cache
if let Some(index) = self.cache.iter().position(|(addr, _)| *addr == address) {
assert!(
Expand Down Expand Up @@ -313,7 +313,7 @@ impl MemoryExtension for CacheLruWriteBack {
memory_before: [u8; MAX_BUS_SIZE],
memory_after: [u8; MAX_BUS_SIZE],
) {
assert!((address as usize % self.bus_size) == 0);
assert!((address as usize).is_multiple_of(self.bus_size));
// Check if address is in cache
if let Some(index) = self.cache.iter().position(|line| line.address == address) {
let line = &self.cache[index];
Expand Down
14 changes: 5 additions & 9 deletions tests/libtests.rs
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Expand Up @@ -19,7 +19,7 @@ use rainbow_rs::{
ScaData, ThumbTraceEmulator, ThumbTraceEmulatorTrait,
};
use rstest::rstest;
use unicorn_engine::unicorn_const::Permission;
use unicorn_engine::unicorn_const::Prot;

#[ctor::ctor]
fn init() {
Expand Down Expand Up @@ -92,12 +92,8 @@ fn generate_leakage(
)
.unwrap();

emu.mem_map(
elfinfo.segments().next().unwrap().start(),
1024,
Permission::all(),
)
.unwrap();
emu.mem_map(elfinfo.segments().next().unwrap().start(), 1024, Prot::ALL)
.unwrap();
emu.load().unwrap();

emu.register_hook_addr(elfinfo.segments().next().unwrap().start(), |emu| {
Expand Down Expand Up @@ -372,7 +368,7 @@ fn test_victim_communication() {
)
.unwrap();

emu.mem_map(0x1000_0000, 1024, Permission::all()).unwrap();
emu.mem_map(0x1000_0000, 1024, Prot::ALL).unwrap();
emu.load().unwrap();

emu.register_hook_addr(0x1000_0000, |emu| {
Expand Down Expand Up @@ -416,7 +412,7 @@ fn test_terminate() {
)
.unwrap();

emu.mem_map(0x1000_0000, 1024, Permission::all()).unwrap();
emu.mem_map(0x1000_0000, 1024, Prot::ALL).unwrap();
emu.load().unwrap();

emu.register_hook_addr(0x1000_0000, |emu| emu.process_inter_thread_communication());
Expand Down