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Add dcd_configure for dwc2 FIFO config #3358
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
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@@ -39,6 +39,7 @@ | |
| #define DWC2_DEBUG 2 | ||
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| #include "device/dcd.h" | ||
| #include "device/usbd.h" | ||
| #include "device/usbd_pvt.h" | ||
| #include "dwc2_common.h" | ||
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@@ -76,6 +77,10 @@ CFG_TUD_MEM_SECTION static struct { | |
| TUD_EPBUF_DEF(setup_packet, 8); | ||
| } _dcd_usbbuf; | ||
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| static tud_configure_dwc2_t _tud_cfg = { | ||
| .bm_double_buffered = 0 | ||
| }; | ||
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| TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) { | ||
| #if TU_CHECK_MCU(OPT_MCU_GD32VF103) | ||
| (void) dwc2; | ||
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@@ -212,8 +217,8 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) { | |
| _dcd_data.allocated_epin_count++; | ||
| } | ||
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| // If The TXFELVL is configured as half empty, the fifo must be twice the max_size. | ||
| if ((dwc2->gahbcfg & GAHBCFG_TX_FIFO_EPMTY_LVL) == 0) { | ||
| // Enable double buffering if configured | ||
| if (((_tud_cfg.bm_double_buffered & (1 << epnum)) != 0) && (epnum > 0)) { | ||
| fifo_size *= 2; | ||
| } | ||
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@@ -446,6 +451,16 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin | |
| //-------------------------------------------------------------------- | ||
| // Controller API | ||
| //-------------------------------------------------------------------- | ||
| // optional dcd configuration, called by tud_configure() | ||
| bool dcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) { | ||
| (void) rhport; | ||
| TU_VERIFY(cfg_id == TUD_CFGID_DWC2 && cfg_param != NULL); | ||
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| const tud_configure_param_t* const cfg = (const tud_configure_param_t*) cfg_param; | ||
| _tud_cfg = cfg->dwc2; | ||
| return true; | ||
| } | ||
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| bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { | ||
| (void) rh_init; | ||
| dwc2_regs_t* dwc2 = DWC2_REG(rhport); | ||
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@@ -492,9 +507,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) { | |
| // Enable required interrupts | ||
| dwc2->gintmsk |= GINTMSK_OTGINT | GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_WUIM; | ||
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| // TX FIFO empty level for interrupt is complete empty | ||
| uint32_t gahbcfg = dwc2->gahbcfg; | ||
| gahbcfg |= GAHBCFG_TX_FIFO_EPMTY_LVL; | ||
|
Collaborator
Author
There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. I think there is no need to set FIFO level to complete empty in any case ? |
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| gahbcfg |= GAHBCFG_GINT; // Enable global interrupt | ||
| dwc2->gahbcfg = gahbcfg; | ||
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