uart: Use synchronous reset in example modules

Made-with: Cursor

Author: higuoxing

rtl/uart/uart_rx_example.v

@@ -42,7 +42,7 @@ module uart_rx_example (
   );
 
   // Latch the received byte and request a TX write when the TX is free.
-  always @(posedge i_clk or negedge i_rst_n) begin
+  always @(posedge i_clk) begin
     if (!i_rst_n) begin
       tx_wr   <= 1'b0;
       tx_data <= 8'b0;

rtl/uart/uart_tx_example.v

@@ -34,7 +34,7 @@ module uart_tx_example (
       .i_tx_data(tx_data)
   );
 
-  always @(posedge i_clk or negedge i_rst_n) begin
+  always @(posedge i_clk) begin
     if (!i_rst_n) begin
       counter <= 0;
     end else begin