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Sync Staging Branch with Main - #101

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intel:nvl_staging_20260610from
tripathidm:nvl_staging_20260610
Sep 8, 2026
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Sync Staging Branch with Main#101
saragsapre merged 4 commits into
intel:nvl_staging_20260610from
tripathidm:nvl_staging_20260610

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arunt1 and others added 4 commits July 21, 2026 23:14
Reordering bus and auxiliary driver registration as required by v7.1 code logic

Signed-off-by: Arun T <arun.t@intel.com>
Signed-off-by: Arun T <arun.t@intel.com>
The external IPU7 PSYS module reads adev->isp->ipu7_bus_ready_to_probe
from struct ipu7_device shared with the core IPU7 driver.

struct ipu7_device currently places ipu7_dir under #ifdef CONFIG_DEBUG_FS
before hw_ver / ipc_reinit / secure_mode / ipu7_bus_ready_to_probe.
When core and PSYS builds differ in CONFIG_DEBUG_FS, field offsets diverge,
which can make PSYS observe an incorrect ipu7_bus_ready_to_probe value and
remain in deferred probe.

Move the debugfs-only member ipu7_dir to the end of struct ipu7_device
so offsets of functional fields stay stable regardless of CONFIG_DEBUG_FS.

This fixes false PSYS defer where core reports bus ready while PSYS still
reads not-ready from the same isp object.

Signed-off-by: Arun T <arun.t@intel.com>
Ipu7 psys  register psys node before add device and debugfs
@arunt1

arunt1 commented Sep 8, 2026

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Looks good

@saragsapre
saragsapre merged commit 1f87f7e into intel:nvl_staging_20260610 Sep 8, 2026
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4 participants