Pinned Loading

1. fresca fresca Public

   Versatile multi-sensor temperature controller

   C++ 11 2

2. crcZero crcZero Public

   Forked from bard0-design/crcZero

   Generates synthesizable VHDL & Verilog, parallel CRC modules from a built-in catalog of 80+ named algorithms, or from user-supplied polynomial parameters. Optional AXI4-S wrappers, Self-checking te…

   Python

3. FPGA-JPEG-LS-encoder FPGA-JPEG-LS-encoder Public

   Forked from WangXuan95/FPGA-JPEG-LS-encoder

   An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器，可实现高压缩率的无损/近无损图像压缩。

   Verilog

4. mjpegZero mjpegZero Public

   Open source synthesizable MJPEG encoder written in behavioral Verilog 2001 with AXI interfaces, up to 1080p30 on low end AMD/Xilinx 7-Series FPGAs. Two operating modes: Full encodes with runtime qu…

   Verilog 1