platforms: fix Tang Nano 20K header pins

enjoy-digital · enjoy-digital · commit 4f4caad16f97 · 2026-05-26T18:00:32.000+02:00
Correct J5/J6 connector entries against the official schematics: J5 pin 3 is SPI MOSI on pin 75, J6 pin 3 is SPI MISO on pin 76, and J6 pins 10/11 are LCD HS/VS on pins 26/25. Sources: Sipeed Tang Nano 20K 3920 schematic (https://dl.sipeed.com/fileList/TANG/Nano_20K/2_Schematic/Tang_Nano_20K_3920_Schematic.pdf) and 3921 schematic (https://dl.sipeed.com/fileList/TANG/Nano_20K/2_Schematic/Tang_Nano_20K_3921_Schematics.pdf).
diff --git a/litex_boards/platforms/sipeed_tang_nano_20k.py b/litex_boards/platforms/sipeed_tang_nano_20k.py
@@ -95,8 +95,8 @@
 # Connectors ---------------------------------------------------------------------------------------
 
 _connectors = [
-        ("J5", "- - - 76 80 42 41 56 54 51 48 55 49 86 79 - - 72 71 53 52"),
-        ("J6", "- 73 74 75 85 77 15 16 27 28 25 26 29 30 31 17 20 19 18 - -")
+        ("J5", "- - - 75 80 42 41 56 54 51 48 55 49 86 79 - - 72 71 53 52"),
+        ("J6", "- 73 74 76 85 77 15 16 27 28 26 25 29 30 31 17 20 19 18 - -")
 ]
 
 # Platform -----------------------------------------------------------------------------------------

Original file line number	Diff line number	Diff line change
`@@ -95,8 +95,8 @@`
`95`	`95`	`# Connectors ---------------------------------------------------------------------------------------`
`96`	`96`
`97`	`97`	`_connectors = [`
`98`		`- ("J5", "- - - 76 80 42 41 56 54 51 48 55 49 86 79 - - 72 71 53 52"),`
`99`		`- ("J6", "- 73 74 75 85 77 15 16 27 28 25 26 29 30 31 17 20 19 18 - -")`
	`98`	`+ ("J5", "- - - 75 80 42 41 56 54 51 48 55 49 86 79 - - 72 71 53 52"),`
	`99`	`+ ("J6", "- 73 74 76 85 77 15 16 27 28 26 25 29 30 31 17 20 19 18 - -")`
`100`	`100`	`]`
`101`	`101`
`102`	`102`	`# Platform -----------------------------------------------------------------------------------------`