Skip to content

Commit 7d0988d

Browse files
Merge pull request #771 from litex-hub/efinix-trion-ddr-followup
targets/efinix_t120: use shared Trion DDR integration
2 parents f8a6f0c + 7dc6867 commit 7d0988d

3 files changed

Lines changed: 66 additions & 240 deletions

File tree

docs/boards_inventory.md

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ python3 .github/scripts/generate_board_inventory.py --write
9393
| `icepi_zero` | icepi_zero | trellis | `50000000.0` | SDCard, SPI SDCard, SPI Flash, Video Terminal, Video Framebuffer | included |
9494
| `intergalaktik_ulx5m_gs` | intergalaktik_ulx5m_gs | colognechip | `20000000.0` | SDCard, SPI SDCard, SPI Flash | included |
9595
| `isx_im1283` | isx_im1283 | vivado | `80000000.0` | SDCard, SPI SDCard | included |
96-
| `jungle_electronics_fireant` | jungle_electronics_fireant | efinity | `33333000.0` | - | toolchain-gated: Require Efinity toolchain. |
96+
| `jungle_electronics_fireant` | jungle_electronics_fireant | efinity | `33330000.0` | - | toolchain-gated: Require Efinity toolchain. |
9797
| `kosagi_fomu` | kosagi_fomu_pvt | icestorm | `12000000.0` | - | included |
9898
| `kosagi_netv2` | kosagi_netv2 | vivado | `100000000.0` | Ethernet, SDCard, SPI SDCard, PCIe | included |
9999
| `krtkl_snickerdoodle` | krtkl_snickerdoodle | vivado | `100000000.0` | - | included |

litex_boards/platforms/efinix_t120_f576_dev_kit.py

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -179,6 +179,48 @@ def i2c_pmod_io(pmod):
179179
),
180180
]
181181

182+
# DDR Configuration --------------------------------------------------------------------------------
183+
184+
ddr_config = {
185+
"preset_id" : 173,
186+
"memory_type" : "LPDDR3",
187+
"controller_width" : 32,
188+
"dram_width" : 32,
189+
"memory_density" : "8G",
190+
"speedbin" : 800,
191+
"fpga_config" : {
192+
"FPGA_ITERM" : "120",
193+
"FPGA_OTERM" : "34",
194+
},
195+
"memory_config" : {
196+
"RTT_NOM" : "RZQ/2",
197+
"MEM_OTERM" : "40",
198+
"CL" : "RL=6/WL=3",
199+
},
200+
"memory_timing" : {
201+
"tRAS" : 42.0,
202+
"tRC" : 60.0,
203+
"tRP" : 18.0,
204+
"tRCD" : 18.0,
205+
"tREFI" : 3.9,
206+
"tRFC" : 210.0,
207+
"tRTP" : 10.0,
208+
"tWTR" : 10.0,
209+
"tRRD" : 10.0,
210+
"tFAW" : 50.0,
211+
},
212+
"control_config" : {
213+
"AMAP" : "ROW-COL_HIGH-BANK-COL_LOW",
214+
"EN_AUTO_PWR_DN" : "Off",
215+
"EN_AUTO_SELF_REF" : "No",
216+
},
217+
"gate_delay_config" : {
218+
"EN_DLY_OVR" : "No",
219+
"GATE_C_DLY" : 3,
220+
"GATE_F_DLY" : 0,
221+
},
222+
}
223+
182224
# Platform -----------------------------------------------------------------------------------------
183225

184226
class Platform(EfinixPlatform):
@@ -188,6 +230,8 @@ class Platform(EfinixPlatform):
188230

189231
def __init__(self, toolchain="efinity"):
190232
EfinixPlatform.__init__(self, "T120F576I4", _io, _connectors, iobank_info=_bank_info, toolchain=toolchain)
233+
self.ddr_config = ddr_config
234+
self.ddr_size = 0x1000_0000 # 256MB per target port.
191235

192236
def create_programmer(self):
193237
return EfinixProgrammer()

0 commit comments

Comments
 (0)