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enjoy-digital merged 1 commit into from
Jul 27, 2026
Merged

boards: normalize Efinix development kit names #767

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10 changes: 5 additions & 5 deletions README.md
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Expand Up @@ -150,12 +150,12 @@ Some of the supported boards, see yours? Give LiteX-Boards a try!
├── digilent_pynq_z1
├── digilent_zedboard
├── ebaz4205
├── efinix_t8f81_dev_kit
├── efinix_t120_f576_dev_kit
├── efinix_t20_f256_dev_kit
├── efinix_t20_mipi_dev_kit
├── efinix_t8_f81_dev_kit
├── efinix_ti375_c529_dev_kit
├── efinix_titanium_ti60_f225_dev_kit
├── efinix_trion_t120_bga576_dev_kit
├── efinix_trion_t20_bga256_dev_kit
├── efinix_trion_t20_mipi_dev_kit
├── efinix_ti60_f225_dev_kit
├── efinix_tz170_j484_dev_kit
├── efinix_xyloni_dev_kit
├── ego1
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10 changes: 5 additions & 5 deletions docs/boards_inventory.md
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Expand Up @@ -64,12 +64,12 @@ python3 .github/scripts/generate_board_inventory.py --write
| `digilent_pynq_z1` | digilent_pynq_z1 | vivado | `125000000.0` | Video Terminal | included |
| `digilent_zedboard` | digilent_arty, digilent_zedboard | vivado | `100000000.0` | - | included |
| `ebaz4205` | ebaz4205 | vivado | `100000000.0` | - | included |
| `efinix_t8f81_dev_kit` | efinix_t8f81_dev_kit | efinity | `33333000.0` | - | toolchain-gated: Require Efinity toolchain. |
| `efinix_t120_f576_dev_kit` | efinix_t120_f576_dev_kit | efinity | `75000000.0` | Ethernet, Etherbone, SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_t20_f256_dev_kit` | efinix_t20_f256_dev_kit | efinity | `45000000.0` | SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_t20_mipi_dev_kit` | efinix_t20_mipi_dev_kit | efinity | `100000000.0` | SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_t8_f81_dev_kit` | efinix_t8_f81_dev_kit | efinity | `33333000.0` | - | toolchain-gated: Require Efinity toolchain. |
| `efinix_ti375_c529_dev_kit` | efinix_ti375_c529_dev_kit | efinity | `100000000.0` | Ethernet, Etherbone, SDCard, SPI SDCard, SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_titanium_ti60_f225_dev_kit` | efinix_titanium_ti60_f225_dev_kit | efinity | `200000000.0` | Ethernet, Etherbone, SDCard, SPI SDCard, SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_trion_t120_bga576_dev_kit` | efinix_trion_t120_bga576_dev_kit | efinity | `75000000.0` | Ethernet, Etherbone, SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_trion_t20_bga256_dev_kit` | efinix_trion_t20_bga256_dev_kit | efinity | `45000000.0` | SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_trion_t20_mipi_dev_kit` | efinix_trion_t20_mipi_dev_kit | efinity | `100000000.0` | SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_ti60_f225_dev_kit` | efinix_ti60_f225_dev_kit | efinity | `200000000.0` | Ethernet, Etherbone, SDCard, SPI SDCard, SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_tz170_j484_dev_kit` | efinix_tz170_j484_dev_kit | efinity | `100000000.0` | SDCard, SPI SDCard, SPI Flash | toolchain-gated: Require Efinity toolchain. |
| `efinix_xyloni_dev_kit` | efinix_xyloni_dev_kit | efinity | `33333000.0` | - | toolchain-gated: Require Efinity toolchain. |
| `ego1` | ego1 | vivado | `100000000.0` | Video Terminal | included |
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0 ...forms/efinix_trion_t120_bga576_dev_kit.py → ...rds/platforms/efinix_t120_f576_dev_kit.py
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0 ...tforms/efinix_trion_t20_bga256_dev_kit.py → ...ards/platforms/efinix_t20_f256_dev_kit.py
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0 ...latforms/efinix_trion_t20_mipi_dev_kit.py → ...ards/platforms/efinix_t20_mipi_dev_kit.py
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0 ..._boards/platforms/efinix_t8f81_dev_kit.py → ...boards/platforms/efinix_t8_f81_dev_kit.py
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0 ...orms/efinix_titanium_ti60_f225_dev_kit.py → ...rds/platforms/efinix_ti60_f225_dev_kit.py
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8 changes: 4 additions & 4 deletions ...rgets/efinix_trion_t120_bga576_dev_kit.py → ...oards/targets/efinix_t120_f576_dev_kit.py
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Expand Up @@ -14,7 +14,7 @@
from litex.gen import *
from litex.gen.genlib.misc import WaitTimer

from litex_boards.platforms import efinix_trion_t120_bga576_dev_kit
from litex_boards.platforms import efinix_t120_f576_dev_kit

from litex.soc.cores.clock import *
from litex.soc.integration.soc import *
Expand Down Expand Up @@ -66,10 +66,10 @@ def __init__(self, sys_clk_freq=75e6,
eth_dynamic_ip = False,
with_led_chaser = True,
**kwargs):
platform = efinix_trion_t120_bga576_dev_kit.Platform()
platform = efinix_t120_f576_dev_kit.Platform()

# USBUART PMOD as Serial--------------------------------------------------------------------
platform.add_extension(efinix_trion_t120_bga576_dev_kit.usb_pmod_io("pmod_e"))
platform.add_extension(efinix_t120_f576_dev_kit.usb_pmod_io("pmod_e"))
if kwargs.get("uart_name", "serial") == "serial":
if kwargs.get("uart_name", "serial") == "serial": kwargs["uart_name"] = "usb_uart"

Expand Down Expand Up @@ -388,7 +388,7 @@ def generate(root, namespaces):

def main():
from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=efinix_trion_t120_bga576_dev_kit.Platform, description="LiteX SoC on Efinix Trion T120 BGA576 Dev Kit.")
parser = LiteXArgumentParser(platform=efinix_t120_f576_dev_kit.Platform, description="LiteX SoC on Efinix Trion T120 BGA576 Dev Kit.")
parser.add_target_argument("--flash", action="store_true", help="Flash bitstream.")
parser.add_target_argument("--sys-clk-freq", default=75e6, type=float, help="System clock frequency.")
parser.add_target_argument("--with-spi-flash", action="store_true", help="Enable memory-mapped SPI flash.")
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6 changes: 3 additions & 3 deletions ...argets/efinix_trion_t20_bga256_dev_kit.py → ...boards/targets/efinix_t20_f256_dev_kit.py
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Expand Up @@ -12,7 +12,7 @@

from litex.gen import *

from litex_boards.platforms import efinix_trion_t20_bga256_dev_kit
from litex_boards.platforms import efinix_t20_f256_dev_kit

from litex.build.io import ClkOutput
from litex.build.generic_platform import *
Expand Down Expand Up @@ -61,7 +61,7 @@ def __init__(self, platform, sys_clk_freq):

class BaseSoC(SoCCore):
def __init__(self, sys_clk_freq=100e6, with_spi_flash=False, with_led_chaser=True, **kwargs):
platform = efinix_trion_t20_bga256_dev_kit.Platform()
platform = efinix_t20_f256_dev_kit.Platform()

# CRG --------------------------------------------------------------------------------------
self.crg = _CRG(platform, sys_clk_freq)
Expand Down Expand Up @@ -97,7 +97,7 @@ def __init__(self, sys_clk_freq=100e6, with_spi_flash=False, with_led_chaser=Tru

def main():
from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=efinix_trion_t20_bga256_dev_kit.Platform, description="LiteX SoC on Efinix Trion T20 BGA256 Dev Kit.")
parser = LiteXArgumentParser(platform=efinix_t20_f256_dev_kit.Platform, description="LiteX SoC on Efinix Trion T20 BGA256 Dev Kit.")
parser.add_target_argument("--flash", action="store_true", help="Flash bitstream.")
parser.add_target_argument("--sys-clk-freq", default=45e6, type=float, help="System clock frequency.")
parser.add_target_argument("--with-spi-flash", action="store_true", help="Enable memory-mapped SPI flash.")
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6 changes: 3 additions & 3 deletions .../targets/efinix_trion_t20_mipi_dev_kit.py → ...boards/targets/efinix_t20_mipi_dev_kit.py
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Expand Up @@ -11,7 +11,7 @@
from litex.gen import *
from litex.gen.genlib.misc import WaitTimer

from litex_boards.platforms import efinix_trion_t20_mipi_dev_kit
from litex_boards.platforms import efinix_t20_mipi_dev_kit

from litex.build.generic_platform import *

Expand Down Expand Up @@ -51,7 +51,7 @@ def __init__(self, platform, sys_clk_freq):

class BaseSoC(SoCCore):
def __init__(self, sys_clk_freq=100e6, with_spi_flash=False, with_led_chaser=True, **kwargs):
platform = efinix_trion_t20_mipi_dev_kit.Platform()
platform = efinix_t20_mipi_dev_kit.Platform()

# CRG --------------------------------------------------------------------------------------
self.crg = _CRG(platform, sys_clk_freq)
Expand All @@ -75,7 +75,7 @@ def __init__(self, sys_clk_freq=100e6, with_spi_flash=False, with_led_chaser=Tru

def main():
from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=efinix_trion_t20_mipi_dev_kit.Platform, description="LiteX SoC on Efinix Trion T20 MIPI Dev Kit.")
parser = LiteXArgumentParser(platform=efinix_t20_mipi_dev_kit.Platform, description="LiteX SoC on Efinix Trion T20 MIPI Dev Kit.")
parser.add_target_argument("--flash", action="store_true", help="Flash bitstream.")
parser.add_target_argument("--sys-clk-freq", default=100e6, type=float, help="System clock frequency.")
parser.add_target_argument("--with-spi-flash", action="store_true", help="Enable memory-mapped SPI flash.")
Expand Down
6 changes: 3 additions & 3 deletions litex_boards/targets/efinix_t8f81_dev_kit.py → ...x_boards/targets/efinix_t8_f81_dev_kit.py
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Expand Up @@ -14,7 +14,7 @@
from litex.gen import *
from litex.gen.genlib.misc import WaitTimer

from litex_boards.platforms import efinix_t8f81_dev_kit
from litex_boards.platforms import efinix_t8_f81_dev_kit

from litex.soc.cores.clock import *
from litex.soc.integration.soc import *
Expand Down Expand Up @@ -53,7 +53,7 @@ def __init__(self, platform, sys_clk_freq):

class BaseSoC(SoCCore):
def __init__(self, bios_flash_offset, sys_clk_freq=33.333e6, with_led_chaser=True, **kwargs):
platform = efinix_t8f81_dev_kit.Platform()
platform = efinix_t8_f81_dev_kit.Platform()

# CRG --------------------------------------------------------------------------------------
self.crg = _CRG(platform, sys_clk_freq)
Expand Down Expand Up @@ -89,7 +89,7 @@ def __init__(self, bios_flash_offset, sys_clk_freq=33.333e6, with_led_chaser=Tru

def main():
from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=efinix_t8f81_dev_kit.Platform, description="LiteX SoC on Efinix T8F81C Dev Kit.")
parser = LiteXArgumentParser(platform=efinix_t8_f81_dev_kit.Platform, description="LiteX SoC on Efinix T8F81C Dev Kit.")
parser.add_target_argument("--flash", action="store_true", help="Flash bitstream.")
parser.add_target_argument("--sys-clk-freq", default=33.333e6, type=float, help="System clock frequency.")
parser.add_target_argument("--bios-flash-offset", default="0x40000", help="BIOS offset in SPI Flash.")
Expand Down
8 changes: 4 additions & 4 deletions ...gets/efinix_titanium_ti60_f225_dev_kit.py → ...oards/targets/efinix_ti60_f225_dev_kit.py
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Expand Up @@ -11,7 +11,7 @@
from litex.gen import *
from litex.gen.genlib.misc import WaitTimer

from litex_boards.platforms import efinix_titanium_ti60_f225_dev_kit
from litex_boards.platforms import efinix_ti60_f225_dev_kit

from litex.soc.cores.clock import *
from litex.soc.integration.soc import *
Expand Down Expand Up @@ -71,7 +71,7 @@ def __init__(self, sys_clk_freq=200e6,
remote_ip = None,
eth_dynamic_ip = False,
**kwargs):
platform = efinix_titanium_ti60_f225_dev_kit.Platform()
platform = efinix_ti60_f225_dev_kit.Platform()

# CRG --------------------------------------------------------------------------------------
self.crg = _CRG(platform, sys_clk_freq)
Expand Down Expand Up @@ -119,7 +119,7 @@ def __init__(self, sys_clk_freq=200e6,

# Ethernet / Etherbone ---------------------------------------------------------------------
if with_ethernet or with_etherbone:
platform.add_extension(efinix_titanium_ti60_f225_dev_kit.rgmii_ethernet_qse_ios("P1"))
platform.add_extension(efinix_ti60_f225_dev_kit.rgmii_ethernet_qse_ios("P1"))
pads = platform.request("eth", eth_phy)
self.ethphy = LiteEthPHYRGMII(
platform = platform,
Expand All @@ -135,7 +135,7 @@ def __init__(self, sys_clk_freq=200e6,

def main():
from litex.build.parser import LiteXArgumentParser
parser = LiteXArgumentParser(platform=efinix_titanium_ti60_f225_dev_kit.Platform, description="LiteX SoC on Efinix Titanium Ti60 F225 Dev Kit.")
parser = LiteXArgumentParser(platform=efinix_ti60_f225_dev_kit.Platform, description="LiteX SoC on Efinix Titanium Ti60 F225 Dev Kit.")
parser.add_target_argument("--flash", action="store_true", help="Flash bitstream.")
parser.add_target_argument("--sys-clk-freq", default=200e6, type=float, help="System clock frequency.")
parser.add_target_argument("--with-spi-flash", action="store_true", help="Enable memory-mapped SPI flash.")
Expand Down
20 changes: 10 additions & 10 deletions test/test_targets.py
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Expand Up @@ -46,19 +46,19 @@
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_titanium_ti60_f225_dev_kit": {
"efinix_ti60_f225_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_trion_t120_bga576_dev_kit": {
"efinix_t120_f576_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_trion_t20_bga256_dev_kit": {
"efinix_t20_f256_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_trion_t20_mipi_dev_kit": {
"efinix_t20_mipi_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
Expand All @@ -74,7 +74,7 @@
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_t8f81_dev_kit": {
"efinix_t8_f81_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
Expand Down Expand Up @@ -137,19 +137,19 @@
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_titanium_ti60_f225_dev_kit": {
"efinix_ti60_f225_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_trion_t120_bga576_dev_kit": {
"efinix_t120_f576_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_trion_t20_bga256_dev_kit": {
"efinix_t20_f256_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_trion_t20_mipi_dev_kit": {
"efinix_t20_mipi_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
Expand All @@ -165,7 +165,7 @@
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
"efinix_t8f81_dev_kit": {
"efinix_t8_f81_dev_kit": {
"category": "external_toolchain",
"reason": "Require Efinity toolchain.",
},
Expand Down