[LTL] Enhance delay operations to support clock and edge specifications

Author: Clo91eaf

include/circt/Dialect/LTL/LTLFolds.td

@@ -21,6 +21,10 @@ def valueTail : NativeCodeCall<"$0.drop_front()">;
 def concatValues : NativeCodeCall<
   "concatValues(ValueRange{$0}, ValueRange{$1})">;
 
+// Ensure that outer and inner delays use the same clock and edge before
+// merging. Accepts (outerClock, innerClock, outerEdge, innerEdge).
+def SameClockAndEdge : Constraint<CPred<"$0 == $1 && $2 == $3">>;
+
 //===----------------------------------------------------------------------===//
 // DelayOp
 //===----------------------------------------------------------------------===//
@@ -36,14 +40,15 @@ def mergedLengths : NativeCodeCall<[{
            : IntegerAttr{}
 }]>;
 def NestedDelays : Pat<
-  (DelayOp (DelayOp $input, $delay1, $length1), $delay2, $length2),
+  (DelayOp (DelayOp $input, $delay1, $length1, $clock1, $edge1), $delay2, $length2, $clock0, $edge0),
   (DelayOp $input, (mergedDelays $delay1, $delay2),
-                   (mergedLengths $length1, $length2))>;
+                   (mergedLengths $length1, $length2), $clock0, $edge0),
+  [(SameClockAndEdge $clock0, $clock1, $edge0, $edge1)]>;
 
 // delay(concat(s, ...), N, M) -> concat(delay(s, N, M), ...)
 def MoveDelayIntoConcat : Pat<
-  (DelayOp (ConcatOp $inputs), $delay, $length),
-  (ConcatOp (concatValues (DelayOp (valueHead $inputs), $delay, $length),
+  (DelayOp (ConcatOp $inputs), $delay, $length, $clock, $edge),
+  (ConcatOp (concatValues (DelayOp (valueHead $inputs), $delay, $length, $clock, $edge),
                           (valueTail $inputs)))>;
 
 //===----------------------------------------------------------------------===//

lib/Conversion/FIRRTLToHW/LowerToHW.cpp

@@ -4717,7 +4717,8 @@ LogicalResult FIRRTLLowering::visitExpr(LTLIntersectIntrinsicOp op) {
 
 LogicalResult FIRRTLLowering::visitExpr(LTLDelayIntrinsicOp op) {
   return setLoweringToLTL<ltl::DelayOp>(op, getLoweredValue(op.getInput()),
-                                        op.getDelayAttr(), op.getLengthAttr());
+                                        op.getDelayAttr(), op.getLengthAttr(),
+                                        Value{}, ltl::ClockEdgeAttr{});
 }
 
 LogicalResult FIRRTLLowering::visitExpr(LTLConcatIntrinsicOp op) {

lib/Dialect/LTL/LTLFolds.cpp

@@ -46,6 +46,35 @@ namespace patterns {
 #include "circt/Dialect/LTL/LTLFolds.cpp.inc"
 } // namespace patterns
 
+namespace {
+struct MergeNestedDelays : OpRewritePattern<DelayOp> {
+  using OpRewritePattern<DelayOp>::OpRewritePattern;
+
+  LogicalResult matchAndRewrite(DelayOp op,
+                                PatternRewriter &rewriter) const override {
+    auto inner = op.getInput().getDefiningOp<DelayOp>();
+    if (!inner)
+      return failure();
+
+    if (op.getClock() != inner.getClock() || op.getEdge() != inner.getEdge())
+      return failure();
+
+    IntegerAttr mergedDelay =
+        rewriter.getI64IntegerAttr(inner.getDelay() + op.getDelay());
+    IntegerAttr mergedLength;
+    if (inner.getLength() && op.getLength())
+      mergedLength =
+          rewriter.getI64IntegerAttr(*inner.getLength() + *op.getLength());
+
+    auto newDelay =
+        DelayOp::create(rewriter, op.getLoc(), inner.getInput(), mergedDelay,
+                        mergedLength, op.getClock(), op.getEdgeAttr());
+    rewriter.replaceOp(op, newDelay.getResult());
+    return success();
+  }
+};
+} // namespace
+
 //===----------------------------------------------------------------------===//
 // AndOp / OrOp / IntersectOp
 //===----------------------------------------------------------------------===//
@@ -90,7 +119,7 @@ OpFoldResult DelayOp::fold(FoldAdaptor adaptor) {
 
 void DelayOp::getCanonicalizationPatterns(RewritePatternSet &results,
                                           MLIRContext *context) {
-  results.add<patterns::NestedDelays>(results.getContext());
+  results.add<MergeNestedDelays>(results.getContext());
   results.add<patterns::MoveDelayIntoConcat>(results.getContext());
 }