Description
The HW and most operations in the SV dialect have moved to the new InnerNameRef-based scheme of declaring symbols that are scoped within the parent module. It would be great if we switched the SV interfaces over to use this scheme as well, and start to introduce a distinction between a "name" that is used for SV emission (as given by the name attribute) and a "symbol" that is used to refer to stuff within the IR (as given by the inner_sym attribute after the change).
Since we are in full control of InnerNameRef, this change would help us avoid some of the pitfalls of the nested symbol tables upstream. Basically, anything that has a sym_name right now (except for the top-level InterfaceOp) would have that attribute replaced with a inner_sym, serving the same purpose. References to stuff in the interface would then be done as #hw.innerNameRef<@InterfaceName::@someSignalSymbol>. That ties the interfaces better into the current "philosophy" of ExportVerilog, and will make it easier to refer to interfaces, their instances, signals, and modports by symbolic name in sv.verbatim operations (e.g. for metadata or script emission that remains stable across renaming and name conflict resolution).
This has the potential to make @teqdruid grumpy!