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I have some doubts about the validity of the canonicalizer in #7868
This doesn't seem safe to do when we are running with repl-seq-mems
, which should mock out the memory with an extmodule. Instead it is lowered to a register and no memory shows up in the metadata.
./bin/firtool --disable-all-randomization --repl-seq-mem --repl-seq-mem-file=mems.txt ./mem.fir
FIRRTL version 4.1.0
circuit Foo:
public module Foo:
input clk : Clock
input r : UInt<1>
output rdata : UInt<8>
input wdata : UInt<8>
input addr : UInt<0>
input en : UInt<1>
input mode : UInt<1>
mem mem:
data-type => UInt<8>
depth => 1
readwriter => rw
read-latency => 1
write-latency => 1
read-under-write => undefined
connect mem.rw.clk, clk
connect mem.rw.en, en
connect mem.rw.addr, addr
connect mem.rw.wmode, mode
connect mem.rw.wmask, UInt<8>(-1)
connect mem.rw.wdata, wdata
connect rdata, mem.rw.rdata
gives:
// ----- 8< ----- FILE "metadata/seq_mems.json" ----- 8< -----
[]
// ----- 8< ----- FILE "mems.txt" ----- 8< -----
We should also make sure that this is working correctly for cmems, especially that it is giving identical results when we are using MemToRegOfVec, FullAsynchronousResetTransform, PrefixModules, etc.
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