[CIR][CIRGen][Builtin][Neon] Lower neon_vsra_n_v and neon_vsraq_n_v (#…

…1326) Clang CGBuiltin Implementation: https://github.com/llvm/clangir/blob/a7383c9d05165d16edba857ddc86e5d29d94d2cc/clang/lib/CodeGen/CGBuiltin.cpp#L9562-L9566 Similar commit: f9dee67 Closes: #1325
llvm · Feb 11, 2025 · 37fab7c · 37fab7c
1 parent dde0549
commit 37fab7c
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Showing 2 changed files with 264 additions and 163 deletions.
diff --git a/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp b/clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
@@ -4410,8 +4410,12 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
     llvm_unreachable("NEON::BI__builtin_neon_vsliq_n_v NYI");
   }
   case NEON::BI__builtin_neon_vsra_n_v:
-  case NEON::BI__builtin_neon_vsraq_n_v:
-    llvm_unreachable("NEON::BI__builtin_neon_vsraq_n_v NYI");
+  case NEON::BI__builtin_neon_vsraq_n_v: {
+    Ops[0] = builder.createBitcast(Ops[0], vTy);
+    Ops[1] = emitNeonRShiftImm(*this, Ops[1], Ops[2], vTy, usgn,
+                               getLoc(E->getExprLoc()));
+    return builder.createAdd(Ops[0], Ops[1]);
+  }
   case NEON::BI__builtin_neon_vrsra_n_v:
   case NEON::BI__builtin_neon_vrsraq_n_v: {
     llvm::SmallVector<mlir::Value> tmpOps = {Ops[1], Ops[2]};