Skip to content

Issues: llvm/llvm-project

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Clear current search query, filters, and sorts
421 Open 1,276 Closed
421 Open 1,276 Closed
Author
Filter by author
Loading
Label
Filter by label
Loading
Use alt + click/return to exclude labels
or ⇧ + click/return for logical OR
Projects
Filter by project
Loading
Milestones
Filter by milestone
Loading
Assignee
Filter by who’s assigned
Sort
Sort by
Newest Oldest Most commented Least commented Recently updated Least recently updated Best match
Most reactions
👍 👎 😄 🎉 😕 ❤️ 🚀 👀

Issues list

[RFC][TableGen] Require DAG argument for complex operands in InstAlias backend:AArch64 backend:ARM backend:PowerPC tablegen
#136411 opened Apr 19, 2025 by s-barannikov Loading…
1
[IA][RISCV] Add support for vp.load/vp.store with shufflevector backend:AArch64 backend:ARM backend:RISC-V backend:X86 llvm:ir
#135445 opened Apr 11, 2025 by mshockwave Loading…
22
[CodeGen] Use pimpl idiom for CVTables (NFC) backend:ARM backend:loongarch backend:RISC-V backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:openmp OpenMP related changes to Clang clang Clang issues not falling into any other category debuginfo
#134217 opened Apr 3, 2025 by nikic Loading…
3
Mark CXX module initializer with PACBTI attributes backend:AArch64 backend:ARM clang:codegen IR generation bugs: mangling, exceptions, etc. clang Clang issues not falling into any other category
#133716 opened Mar 31, 2025 by vhscampos Loading…
9
Remove Native Client support backend:ARM backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category llvm:binary-utilities mc Machine (object) code
#133661 opened Mar 30, 2025 by brad0 Loading…
11
[Target] Use TableGen named argument syntax. NFC. backend:AArch64 backend:AMDGPU backend:ARM backend:m68k backend:NVPTX backend:RISC-V backend:X86
#133418 opened Mar 28, 2025 by jayfoad Loading…
5
[CodeGen][ARM] Missed optimizated load store pair instruction combine backend:ARM llvm:optimizations missed-optimization
#133048 opened Mar 26, 2025 by hstk30-hw
8
[llvm-objdump][ARM] Not implement findPltEntries for ARM lead to parse plt entry incorrectly backend:ARM tools:llvm-objdump
#132694 opened Mar 24, 2025 by hstk30-hw
2
Compilation failure in Webkit 2.48.0 with Clang-20 on ARM backend:ARM llvm:codegen platform:linux
#132322 opened Mar 21, 2025 by kraj
1
[PHIElimination] Reuse existing COPY in predecessor basic block backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:loongarch backend:PowerPC backend:SystemZ backend:X86 debuginfo llvm:globalisel llvm:regalloc llvm:transforms
#131837 opened Mar 18, 2025 by guy-david Loading…
6
[DAGCombiner] Eliminate fp casts if we have the right fast math flags backend:AArch64 backend:AMDGPU backend:ARM llvm:SelectionDAG SelectionDAGISel as well
#131345 opened Mar 14, 2025 by john-brawn-arm Loading…
15
[CodeGen] Utilizing register units based liveIns tracking in MBB backend:ARM llvm:codegen
#129847 opened Mar 5, 2025 by vg0204 Loading…
@vg0204
18
[LLVM][ARM] Wrong profiling information in llvm-mca for cortex-m52 backend:ARM llvm:codegen question A question, not bug report. Check out https://llvm.org/docs/GettingInvolved.html instead!
#129660 opened Mar 4, 2025 by shazha01
3
[win][x64] Unwind v2 3/n: Add support for emitting unwind v2 information (equivalent to MSVC /d2epilogunwind) backend:AArch64 backend:ARM backend:X86 clang:codegen IR generation bugs: mangling, exceptions, etc. clang:driver 'clang' and 'clang++' user-facing binaries. Not 'clang-cl' clang:frontend Language frontend issues, e.g. anything involving "Sema" clang Clang issues not falling into any other category mc Machine (object) code
#129142 opened Feb 27, 2025 by dpaoliello Loading…
20
[ARM] Use correct ABI for atomic functions backend:AArch64 backend:ARM llvm:SelectionDAG SelectionDAGISel as well
#128891 opened Feb 26, 2025 by ostannard Loading…
1
6
[Support] report_fatal_error: Do not generate crash backtrace by default backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX backend:PowerPC backend:SystemZ backend:WebAssembly backend:X86 debuginfo llvm:binary-utilities llvm:globalisel llvm:support llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) mc Machine (object) code
#128495 opened Feb 24, 2025 by optimisan • Draft
19
[clang][ARM][AArch64] Define intrinsics guarded by __has_builtin on all platforms backend:AArch64 backend:ARM backend:X86 clang:frontend Language frontend issues, e.g. anything involving "Sema" clang:headers Headers provided by Clang, e.g. for intrinsics clang Clang issues not falling into any other category
#128222 opened Feb 21, 2025 by sarnex Loading…
20
[ARM][AArch64] Vector intrinsics do not match hardware behavior for NaN, subnormals backend:AArch64 backend:ARM miscompilation
#128006 opened Feb 20, 2025 by ostannard
3
[MachineSink] Lower SplitEdgeProbabilityThreshold backend:AArch64 backend:AMDGPU backend:ARM backend:PowerPC backend:WebAssembly backend:X86 debuginfo llvm:globalisel
#127666 opened Feb 18, 2025 by guy-david Loading…
3
[CodeGen] Provide MachineFunction::hasUnsafeFPMath backend:AArch64 backend:AMDGPU backend:ARM backend:NVPTX backend:PowerPC backend:X86 llvm:globalisel llvm:SelectionDAG SelectionDAGISel as well
#127488 opened Feb 17, 2025 by paperchalice Loading…
12
[llvm][ARM] Add a cortex-m4f alignment hazard recognizer backend:ARM
#126991 opened Feb 13, 2025 by jroelofs Loading…
21
[AArch64] Skip storing of stack arguments when lowering tail calls backend:AArch64 backend:ARM
#126735 opened Feb 11, 2025 by guy-david Loading…
7
ARM: Remove override of shouldRewriteCopySrc backend:ARM
#125219 opened Jan 31, 2025 by arsenm Loading…
8
[TARGETS-PARSER] Added const reference for params with size >= 16 bytes backend:AArch64 backend:AMDGPU backend:ARM backend:Hexagon backend:NVPTX
#125083 opened Jan 30, 2025 by GermanAizek Loading…
9
Added const reference for params wth size >= 16 bytes backend:AArch64 backend:AMDGPU backend:ARM backend:DirectX backend:Hexagon backend:NVPTX backend:RISC-V debuginfo llvm:analysis llvm:binary-utilities llvm:globalisel llvm:ir llvm:SandboxIR llvm:SelectionDAG SelectionDAGISel as well llvm:support llvm:transforms LTO Link time optimization (regular/full LTO or ThinLTO) PGO Profile Guided Optimizations platform:windows tablegen testing-tools tools:llvm-exegesis vectorizers
#125074 opened Jan 30, 2025 by GermanAizek Loading…
11
ProTip! Add no:assignee to see everything that’s not assigned.