55r"""Clock Manager Generator
66"""
77
8- import argparse
98import logging as log
109import sys
11- import subprocess
1210from collections import OrderedDict
13- from io import StringIO
1411from pathlib import Path
1512
1613import hjson
17- from mako import exceptions
1814from mako .template import Template
1915
16+
2017# Common header for generated files
2118def main ():
2219
2320 current = Path (__file__ ).parent .absolute ()
2421
2522 hjson_tpl = Template (filename = str (current / '../data/clkmgr.hjson.tpl' ))
26- rtl_tpl = Template (filename = str (current / '../data/clkmgr.sv.tpl' ))
27- pkg_tpl = Template (filename = str (current / '../data/clkmgr_pkg.sv.tpl' ))
23+ rtl_tpl = Template (filename = str (current / '../data/clkmgr.sv.tpl' ))
24+ pkg_tpl = Template (filename = str (current / '../data/clkmgr_pkg.sv.tpl' ))
2825
2926 hjson_out = current / '../data/clkmgr.hjson'
30- rtl_out = current / '../rtl/clkmgr.sv'
31- pkg_out = current / '../rtl/clkmgr_pkg.sv'
27+ rtl_out = current / '../rtl/clkmgr.sv'
28+ pkg_out = current / '../rtl/clkmgr_pkg.sv'
3229
33- cfgpath = current / '../data/clkmgr.cfg.example.hjson'
30+ cfgpath = current / '../data/clkmgr.cfg.example.hjson'
3431
3532 try :
3633 with open (cfgpath , 'r' ) as cfg :
37- topcfg = hjson .load (cfg ,use_decimal = True ,object_pairs_hook = OrderedDict )
34+ topcfg = hjson .load (cfg , use_decimal = True , object_pairs_hook = OrderedDict )
3835 except ValueError :
3936 log .error ("{} not found" .format (cfgpath ))
4037 raise SystemExit (sys .exc_info ()[1 ])
@@ -48,45 +45,44 @@ def main():
4845 sw_clks = OrderedDict ()
4946 hint_clks = OrderedDict ()
5047
51- ft_clks = {clk :src for grp in grps for (clk ,src ) in grp ['clocks' ].items ()
52- if grp ['name' ] == 'powerup' }
48+ ft_clks = {clk : src for grp in grps for (clk , src ) in grp ['clocks' ].items ()
49+ if grp ['name' ] == 'powerup' }
5350
5451 # root-gate clocks
55- rg_clks = {clk :src for grp in grps for (clk ,src ) in grp ['clocks' ].items ()
56- if grp ['name' ] != 'powerup' and grp ['sw_cg' ] == 'no' }
52+ rg_clks = {clk : src for grp in grps for (clk , src ) in grp ['clocks' ].items ()
53+ if grp ['name' ] != 'powerup' and grp ['sw_cg' ] == 'no' }
5754
5855 # direct sw control clocks
59- sw_clks = {clk :src for grp in grps for (clk ,src ) in grp ['clocks' ].items ()
60- if grp ['sw_cg' ] == 'yes' }
56+ sw_clks = {clk : src for grp in grps for (clk , src ) in grp ['clocks' ].items ()
57+ if grp ['sw_cg' ] == 'yes' }
6158
6259 # sw hint clocks
63- hint_clks = {clk :src for grp in grps for (clk ,src ) in grp ['clocks' ].items ()
60+ hint_clks = {clk : src for grp in grps for (clk , src ) in grp ['clocks' ].items ()
6461 if grp ['sw_cg' ] == 'hint' }
6562
66-
6763 # generate hjson
6864 hjson_out .write_text (
69- hjson_tpl .render (cfg = topcfg ,
70- ft_clks = ft_clks ,
71- rg_clks = rg_clks ,
72- sw_clks = sw_clks ,
73- hint_clks = hint_clks ))
65+ hjson_tpl .render (cfg = topcfg ,
66+ ft_clks = ft_clks ,
67+ rg_clks = rg_clks ,
68+ sw_clks = sw_clks ,
69+ hint_clks = hint_clks ))
7470
7571 # generate rtl package
7672 pkg_out .write_text (
77- pkg_tpl .render (cfg = topcfg ,
78- ft_clks = ft_clks ,
79- rg_clks = rg_clks ,
80- sw_clks = sw_clks ,
81- hint_clks = hint_clks ))
73+ pkg_tpl .render (cfg = topcfg ,
74+ ft_clks = ft_clks ,
75+ rg_clks = rg_clks ,
76+ sw_clks = sw_clks ,
77+ hint_clks = hint_clks ))
8278
8379 # generate top level
8480 rtl_out .write_text (
85- rtl_tpl .render (cfg = topcfg ,
86- ft_clks = ft_clks ,
87- rg_clks = rg_clks ,
88- sw_clks = sw_clks ,
89- hint_clks = hint_clks ))
81+ rtl_tpl .render (cfg = topcfg ,
82+ ft_clks = ft_clks ,
83+ rg_clks = rg_clks ,
84+ sw_clks = sw_clks ,
85+ hint_clks = hint_clks ))
9086
9187
9288if __name__ == "__main__" :
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