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2 changes: 1 addition & 1 deletion hw/ip/uart/doc/theory_of_operation.md
Original file line number Diff line number Diff line change
Expand Up @@ -70,7 +70,7 @@ detected as high and the optional parity bit is correct the data byte
is pushed into a 32 byte deep RX FIFO. The data can be read out by
reading [`RDATA`](registers.md#rdata) register.

This behaviour of the receiver can be used to compute the approximate
This behavior of the receiver can be used to compute the approximate
baud clock frequency error that can be tolerated between the
transmitter at the other end of the cable and the receiver. The
initial sample point is aligned with the center of the START bit. The
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