Add support of shared upgrade slot feature in simulator#2665
Add support of shared upgrade slot feature in simulator#2665DOAR-Infineon wants to merge 1 commit intomcu-tools:mainfrom
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d3zd3z
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Overall, this looks really good. It isn't clear to me where this will get covered in CI tests. We might want to consider, in the future, whether we want a bit more coverage of some of the power-loss test cases in this configuration.
But this is really good for testing what we do have.
| | Mode | Supported | Scratch needed | Device | Notes | | ||
| |------|-----------|----------------|--------|-------| | ||
| | Overwrite-only | **Yes** | No | `PSOCEdgeE8xSpiFlash` | Simplest layout | | ||
| | Swap-using-scratch | **Yes** | Yes (1 sector) | `PSOCEdgeE8xSpiFlash` | Equal primary/secondary sizes | |
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Given that we're trying to deprecate swap-using-scratch, I wonder if we should have this line at all (or the scratch column). I suppose it is here for completeness.
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Signed-off-by: INFINEON\DovhalA <artem.dovhal@infineon.com>
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| > If they differ, boot will print *"Cannot upgrade: slots are not | ||
| > compatible"* and refuse to swap. | ||
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| ### Staggering the trailers |
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can you explain why this is needed? The MCUboot header https://github.com/mcu-tools/mcuboot/blob/main/boot/bootutil/include/bootutil/image.h#L166 includes uint32_t ih_load_addr; which gives the exact address to load to which maps to one image only
d3zd3z
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Jamie's (nordicjcm)'s question needs to be addresses. They are apparently doing this without needing any staggering.
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Summary
Adds simulator device configurations and tests that validate the shared upgrade slot feature — a multi-image layout where multiple images share a single physical flash region for their secondary (upgrade) slots. This significantly reduces flash usage in systems where only one image is upgraded at a time.
Motivation
In the standard MCUboot multi-image configuration, each image requires its own dedicated secondary slot. For a 2-image system with 64 KB slots, this means 128 KB of flash reserved for upgrades. With the shared upgrade slot layout, both secondary slots overlap on the same physical SPI flash region, reducing upgrade flash to ~68 KB — a savings of ~47%.