espressif: ESP32-C61 initial support

.github/workflows/espressif.yaml

@@ -18,7 +18,7 @@ jobs:
   environment:
     strategy:
       matrix:
-        targets: [esp32, esp32s2, esp32s3, esp32c2, esp32c3, esp32c5, esp32c6, esp32h2]
+        targets: [esp32, esp32s2, esp32s3, esp32c2, esp32c3, esp32c5, esp32c6, esp32c61, esp32h2]
         features:
         - "secureboot-sign-rsa2048,secureboot-sign-rsa3072,secureboot-sign-ec256,secureboot-sign-ed25519"
         - "serialrecovery"

boot/espressif/CMakeLists.txt

@@ -38,6 +38,7 @@ elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2" OR
   "${MCUBOOT_TARGET}" STREQUAL "esp32c3" OR
   "${MCUBOOT_TARGET}" STREQUAL "esp32c5" OR
   "${MCUBOOT_TARGET}" STREQUAL "esp32c6" OR
+  "${MCUBOOT_TARGET}" STREQUAL "esp32c61" OR
   "${MCUBOOT_TARGET}" STREQUAL "esp32h2")
   set(MCUBOOT_ARCH "riscv")
 endif()
@@ -109,6 +110,8 @@ elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c5")
   set(ESP_MIN_REVISION 0)
 elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c6")
   set(ESP_MIN_REVISION 0)
+elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c61")
+  set(ESP_MIN_REVISION 0)
 elseif("${MCUBOOT_TARGET}" STREQUAL "esp32h2")
   set(ESP_MIN_REVISION 0)
 else()
@@ -433,7 +436,8 @@ if(NOT DEFINED ESP_FLASH_FREQ)
     "${MCUBOOT_TARGET}" STREQUAL "esp32s3" OR
     "${MCUBOOT_TARGET}" STREQUAL "esp32c3" OR
     "${MCUBOOT_TARGET}" STREQUAL "esp32c5" OR
-    "${MCUBOOT_TARGET}" STREQUAL "esp32c6")
+    "${MCUBOOT_TARGET}" STREQUAL "esp32c6" OR
+    "${MCUBOOT_TARGET}" STREQUAL "esp32c61")
     set(ESP_FLASH_FREQ "40m")
   elseif("${MCUBOOT_TARGET}" STREQUAL "esp32c2")
     set(ESP_FLASH_FREQ "60m")

boot/espressif/ci_configs/esp32c61-secureboot.conf

@@ -0,0 +1,11 @@
+# SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# ATTENTION:
+# This configuration file targets the building for CI environment and contains
+# a set of definitions to resemble a bootloader image for RELEASE environment.
+# Running the generated firmware image may result in irreversible operations
+# to the chip!
+
+CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME=1

boot/espressif/hal/include/esp32c61/esp32c61.cmake

@@ -0,0 +1,35 @@
+# SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+#
+# SPDX-License-Identifier: Apache-2.0
+
+list(APPEND include_dirs
+    ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/private_include
+)
+
+list(APPEND hal_srcs
+    ${esp_hal_dir}/components/hal/cache_hal.c
+    ${esp_hal_dir}/components/efuse/src/efuse_controller/keys/with_key_purposes/esp_efuse_api_key.c
+    ${esp_hal_dir}/components/esp_rom/patches/esp_rom_regi2c_${MCUBOOT_TARGET}.c
+    ${esp_hal_dir}/components/esp_hw_support/port/${MCUBOOT_TARGET}/pmu_param.c
+)
+
+if (DEFINED CONFIG_ESP_CONSOLE_UART_CUSTOM)
+    list(APPEND hal_srcs
+        ${src_dir}/${MCUBOOT_TARGET}/console_uart_custom.c
+        )
+endif()
+
+list(APPEND LINKER_SCRIPTS
+    -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.libc.ld
+    -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.newlib.ld
+    -T${esp_hal_dir}/components/esp_rom/${MCUBOOT_TARGET}/ld/${MCUBOOT_TARGET}.rom.version.ld
+)
+
+set_source_files_properties(
+    ${esp_hal_dir}/components/bootloader_support/src/esp_image_format.c
+    ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash.c
+    ${esp_hal_dir}/components/bootloader_support/bootloader_flash/src/bootloader_flash_config_${MCUBOOT_TARGET}.c
+    ${esp_hal_dir}/components/hal/mmu_hal.c
+    ${esp_hal_dir}/components/hal/cache_hal.c
+    PROPERTIES COMPILE_FLAGS
+    "-Wno-logical-op")

boot/espressif/hal/include/esp32c61/sdkconfig.h

@@ -0,0 +1,37 @@
+/*
+ * SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#define BOOTLOADER_BUILD 1
+#define NON_OS_BUILD 1
+#define CONFIG_LIBC_PICOLIBC 1
+#define CONFIG_IDF_FIRMWARE_CHIP_ID 0x0014
+#define CONFIG_IDF_TARGET "esp32c61"
+#define CONFIG_IDF_TARGET_ESP32C61 1
+#define CONFIG_ESP32C61_REV_MIN_100 1
+#define CONFIG_ESP32C61_REV_MIN_FULL 100
+#define CONFIG_ESP_REV_MIN_FULL CONFIG_ESP32C61_REV_MIN_FULL
+#define CONFIG_ESP32C61_REV_MAX_FULL 199
+#define CONFIG_ESP_REV_MAX_FULL CONFIG_ESP32C61_REV_MAX_FULL
+#define CONFIG_IDF_TARGET_ARCH_RISCV 1
+#define CONFIG_MMU_PAGE_SIZE 0x10000
+#define SOC_MMU_PAGE_SIZE CONFIG_MMU_PAGE_SIZE /* from soc/CMakeLists */
+#define CONFIG_XTAL_FREQ 40
+#define CONFIG_SPI_FLASH_ROM_DRIVER_PATCH 1
+#define CONFIG_MCUBOOT 1
+#define NDEBUG 1
+#define CONFIG_BOOTLOADER_WDT_TIME_MS 9000
+#ifdef CONFIG_ESP_CONSOLE_UART_NUM
+#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM CONFIG_ESP_CONSOLE_UART_NUM
+#endif
+#ifdef CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG
+#define CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM ESP_ROM_USB_SERIAL_DEVICE_NUM
+#endif
+#define CONFIG_ESP_CONSOLE_UART_BAUDRATE 115200
+#define CONFIG_BOOTLOADER_OFFSET_IN_FLASH 0x0000
+#define CONFIG_PARTITION_TABLE_OFFSET 0x10000
+#define CONFIG_EFUSE_MAX_BLK_LEN 256
+#define CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT 1
+#define CONFIG_BOOTLOADER_CPU_CLK_FREQ_MHZ 80

boot/espressif/hal/include/mcuboot_config/mcuboot_logging.h

@@ -27,6 +27,8 @@ extern int ets_printf(const char *fmt, ...);
 #define TARGET "[esp32c3]"
 #elif CONFIG_IDF_TARGET_ESP32C6
 #define TARGET "[esp32c6]"
+#elif CONFIG_IDF_TARGET_ESP32C61
+#define TARGET "[esp32c61]"
 #elif CONFIG_IDF_TARGET_ESP32C5
 #define TARGET "[esp32c5]"
 #elif CONFIG_IDF_TARGET_ESP32C2

boot/espressif/port/esp32c61/bootloader.conf

@@ -0,0 +1,99 @@
+# SPDX-FileCopyrightText: 2026 Espressif Systems (Shanghai) CO LTD
+#
+# SPDX-License-Identifier: Apache-2.0
+
+# Define upgrade mode (default is CONFIG_ESP_BOOT_SWAP_USING_SCRATCH)
+# CONFIG_ESP_BOOT_SWAP_USING_MOVE=y
+# CONFIG_ESP_BOOT_UPGRADE_ONLY=y
+
+CONFIG_ESP_FLASH_SIZE=4MB
+CONFIG_ESP_BOOTLOADER_SIZE=0xF000
+CONFIG_ESP_BOOTLOADER_OFFSET=0x0000
+CONFIG_ESP_IMAGE0_PRIMARY_START_ADDRESS=0x20000
+CONFIG_ESP_APPLICATION_SIZE=0x1C0000
+CONFIG_ESP_IMAGE0_SECONDARY_START_ADDRESS=0x1E0000
+CONFIG_ESP_MCUBOOT_WDT_ENABLE=y
+CONFIG_ESP_SCRATCH_OFFSET=0x3E0000
+CONFIG_ESP_SCRATCH_SIZE=0x1F000
+
+CONFIG_BOOTLOADER_PROJECT_VER=0x1
+
+# When enabled, prevents updating image to an older version
+# CONFIG_ESP_DOWNGRADE_PREVENTION=y
+# This option makes downgrade prevention rely also on security
+# counter (defined using imgtool) instead of only image version
+# CONFIG_ESP_DOWNGRADE_PREVENTION_SECURITY_COUNTER=y
+
+# Enables the MCUboot Serial Recovery, that allows the use of
+# MCUMGR to upload a firmware through the serial port
+# CONFIG_ESP_MCUBOOT_SERIAL=y
+# Use Serial through USB JTAG Serial port for Serial Recovery
+# CONFIG_ESP_MCUBOOT_SERIAL_USB_SERIAL_JTAG=y
+# Use sector erasing (recommended) instead of entire image size
+# erasing when uploading through Serial Recovery
+# CONFIG_ESP_MCUBOOT_ERASE_PROGRESSIVELY=y
+
+# GPIO used to boot on Serial Recovery
+# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT=5
+# GPIO input type (0 for Pull-down, 1 for Pull-up)
+# CONFIG_ESP_SERIAL_BOOT_GPIO_INPUT_TYPE=0
+# GPIO signal value
+# CONFIG_ESP_SERIAL_BOOT_GPIO_DETECT_VAL=1
+# Delay time for identify the GPIO signal
+# CONFIG_ESP_SERIAL_BOOT_DETECT_DELAY_S=5
+# UART port used for serial communication (not needed when using USB)
+# CONFIG_ESP_SERIAL_BOOT_UART_NUM=1
+# GPIO for Serial RX signal
+# CONFIG_ESP_SERIAL_BOOT_GPIO_RX=8
+# GPIO for Serial TX signal
+# CONFIG_ESP_SERIAL_BOOT_GPIO_TX=9
+# Baudrate for Serial Recovery communication
+# CONFIG_ESP_SERIAL_BOOT_BAUDRATE=115200
+
+# Use UART0 for console printing (use either UART or USB alone)
+CONFIG_ESP_CONSOLE_UART=y
+CONFIG_ESP_CONSOLE_UART_NUM=0
+# Configures alternative UART port for console printing
+# (UART_NUM=0 must not be changed)
+# CONFIG_ESP_CONSOLE_UART_CUSTOM=y
+# CONFIG_ESP_CONSOLE_UART_TX_GPIO=9
+# CONFIG_ESP_CONSOLE_UART_RX_GPIO=8
+# Use USB JTAG Serial for console printing
+# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG=y
+
+# CONFIG_ESP_SIGN_EC256=y
+# CONFIG_ESP_SIGN_ED25519=n
+# CONFIG_ESP_SIGN_RSA=n
+# CONFIG_ESP_SIGN_RSA_LEN=2048
+
+# Use Tinycrypt lib for EC256 or ED25519 signing
+# CONFIG_ESP_USE_TINYCRYPT=y
+# Use Mbed TLS lib for RSA image signing
+# CONFIG_ESP_USE_MBEDTLS=n
+
+# It is strongly recommended to generate a new signing key
+# using imgtool instead of use the existent sample
+# CONFIG_ESP_SIGN_KEY_FILE=root-ec-p256.pem
+
+# Hardware Secure Boot related options
+# CONFIG_SECURE_SIGNED_ON_BOOT=1
+# CONFIG_SECURE_SIGNED_APPS_ECDSA_V2_SCHEME=1
+# CONFIG_SECURE_BOOT=1
+# CONFIG_SECURE_BOOT_V2_ENABLED=1
+
+# Hardware Flash Encryption related options
+# CONFIG_SECURE_FLASH_ENC_ENABLED=1
+# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_ENC=1
+# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_DEC=1
+# CONFIG_SECURE_FLASH_UART_BOOTLOADER_ALLOW_CACHE=1
+# CONFIG_SECURE_FLASH_ENCRYPTION_MODE_DEVELOPMENT=1
+# CONFIG_SECURE_BOOT_ALLOW_JTAG=1
+# CONFIG_SECURE_BOOT_ALLOW_ROM_BASIC=1
+
+# Options for enabling eFuse emulation in Flash (adjust
+# CONFIG_EFUSE_VIRTUAL_OFFSET accordingly in order
+# to not overlap with other flash regions)
+# CONFIG_EFUSE_VIRTUAL=1
+# CONFIG_EFUSE_VIRTUAL_KEEP_IN_FLASH=1
+# CONFIG_EFUSE_VIRTUAL_OFFSET=0x250000
+# CONFIG_EFUSE_VIRTUAL_SIZE=0x2000