Athestia

This project focuses on developing a quantum-safe digital signature solution using the post-quantum Module-Lattice-Based Digital Signature Standard algorithm (named as Dilithium), a lattice-based cryptographic method designed to withstand quantum computing threats. This project involves the designing of a hardware accelerator for the Dilithium digital signature operations using SystemVerilog. To simulate the working of Dilithium, we will integrate it with the Named Data Network. Hence, the plan is to utilize the MiniNDN Framework which provides a lightweight simulation environment for NDN Network. Hence, we will modify the NDN self-certification process using Dilithium. The Dilithium accelerator(key generation, signature, and verification Modules) was ported onto Field Programmable Gate Array (FPGA) platforms. Communication between the FPGA and the miniNDN was facilitated through the UART protocol. Extensive testing was conducted to validate the performance and security of the system, confirming that it meets post-quantum cryptographic standards. The outcome of this project will demonstrate the feasibility of integrating post-quantum cryptographic accelerators within NDN, significantly improving the security of communication.