Releases: mlir-rs/tblgen-rs
Releases · mlir-rs/tblgen-rs
v0.9.0
Added
- LLVM 22 support (#59)
BitsInit::known_bits_to_int()(LLVM 22 only)- Direct typed value accessors on
Record:int_value,str_value,bit_value,def_value,dag_value,bits_init_value,list_init_value,list_of_defs_value,list_of_ints_value,list_of_strings_value,optional_str_value,optional_def_value,is_value_unset - Record identity/metadata:
is_class,def_init,id,name_init,has_direct_super_class - RecordRecTy accessors:
num_type_classes,type_class,type_is_subclass_of - RecordValue metadata:
is_template_arg,is_nonconcrete_ok,bits_width,list_element_type DagInit::arg_nofor named argument lookupRecordKeeper::input_filenameandRecordKeeper::global- LLVM 21 test matrix in CI
Full Changelog: v0.8.1...v0.9.0
v0.8.1
What's Changed
- Add usage examples covering core API surface by @edg-l in #52
- Add double-ended iteration, Hash, and debug helpers across init/record types by @edg-l in #53
- Fix header-hygiene in TableGen.hpp by @dtolnay in #54
- Fix soundness bugs and extend API coverage for 0.8.1 by @edg-l in #55
- Bump version to 0.8.1 by @edg-l in #56
New Contributors
Full Changelog: v0.8.0...v0.8.1
v0.8.0
Fixed
- Fix soundness bugs and iterator memory leaks (#50)
tableGenRecordGetFirstValuenow returnsnullptrfor empty records, preventing UB when iterating a record with no fieldsRecordValueIter::next()no longer callstableGenRecordValNextwith a null pointer after the iterator is exhaustedNamedRecordIter::clone()no longer segfaults when called on an exhausted iteratorGetNextClass/GetNextDefnow correctly free the heap-allocated iterator object when the end is reached- Memory leak in
TableGenParser::parse()on failed file inclusion fixed viastd::unique_ptr - Replace panicking
From<BitInit> for bool,From<BitsInit> for Vec<bool>, andFrom<IntInit> for i64withTryFromimpls that return errors instead of panicking on variable references or C API failures
- Strip
-D_FORTIFY_SOURCEfrom llvm-config flags inbuild.rs(#49) - Fix
DagIterstopping early on unnamed dag arguments (#48) - Add
From<BitsInit> for Vec<Option<bool>>(#47) - Fix UB in
BitsInit::bit()when bit is aVarBitInit(#46) - Fix llvm-config static link detection and exit status handling (#45)
Added
RecordIternow implementsExactSizeIteratorandsize_hint()(#50)
v0.5.1
What's Changed
- Remove
docdirectory by @raviqqe in #1 - fix ci somewhat by @edg-l in #6
- version 0.3.4 by @edg-l in #7
- fix docs by @edg-l in #8
- metadata by @edg-l in #9
- fix by @edg-l in #10
- Update LLVM to 19 by @raviqqe in #14
- Bump version by @raviqqe in #15
- Refactor
build.rsby @raviqqe in #16 - Fix build and linting by @raviqqe in #19
- Use native
AddIncludeFilemethod by @raviqqe in #18 - bump version by @edg-l in #20
- upd docs by @edg-l in #21
- Apply
clang-formatby @raviqqe in #22 - Update crate name by @edg-l in #23
New Contributors
Full Changelog: https://github.com/mlir-rs/tblgen-rs/commits/v0.5.1