Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension


Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 6 additions & 6 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ jobs:
uses: dtolnay/rust-toolchain@stable
with:
components: rustfmt
toolchain: nightly-2025-04-06
toolchain: nightly-2025-05-09

- name: Run `cargo fmt`
run: |
Expand All @@ -41,7 +41,7 @@ jobs:
uses: dtolnay/rust-toolchain@stable
with:
components: clippy
toolchain: nightly-2025-04-06
toolchain: nightly-2025-05-09
targets: riscv32im-unknown-none-elf

- name: Add clippy
Expand Down Expand Up @@ -79,7 +79,7 @@ jobs:
- name: Install Rust
uses: dtolnay/rust-toolchain@stable
with:
toolchain: nightly-2025-04-06
toolchain: nightly-2025-05-09
targets: riscv32im-unknown-none-elf

- name: Install cargo-expand
Expand Down Expand Up @@ -113,7 +113,7 @@ jobs:
- name: Install Rust
uses: dtolnay/rust-toolchain@stable
with:
toolchain: nightly-2025-04-06 # same version as normal tests
toolchain: nightly-2025-05-09 # same version as normal tests
# need riscv32im-unknown-none-elf for building guest binaries
targets: wasm32-wasip1, riscv32im-unknown-none-elf

Expand Down Expand Up @@ -153,7 +153,7 @@ jobs:
- name: Install Rust
uses: dtolnay/rust-toolchain@stable
with:
toolchain: nightly-2025-04-06
toolchain: nightly-2025-05-09
targets: riscv32im-unknown-none-elf

- uses: taiki-e/install-action@nextest
Expand Down Expand Up @@ -217,7 +217,7 @@ jobs:
- name: Install Rust
uses: dtolnay/rust-toolchain@stable
with:
toolchain: nightly-2025-04-06
toolchain: nightly-2025-05-09
targets: riscv32im-unknown-none-elf

- name: Download pre-built host project
Expand Down
2 changes: 1 addition & 1 deletion cli/src/command/host.rs
Original file line number Diff line number Diff line change
Expand Up @@ -164,5 +164,5 @@ const GUEST_TEMPLATE_SRC_MAIN: &str = include_str!(concat!(guest_examples_dir!()

// freeze toolchain that works with all provers
const RUST_TOOLCHAIN: &str = r#"[toolchain]
channel = "nightly-2025-04-06"
channel = "nightly-2025-05-09"
"#;
7 changes: 1 addition & 6 deletions common/src/memory/alignment.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,12 +36,7 @@ pub trait Alignable: Sized + Copy + Display + Debug {
fn is_aligned_to<const N: usize>(self) -> bool;

fn assert_aligned_to<const N: usize>(self) {
assert!(
self.is_aligned_to::<N>(),
"{} is not aligned to {}",
self,
N
);
assert!(self.is_aligned_to::<N>(), "{self} is not aligned to {N}");
}

/// Assert that the value is aligned to a word boundary.
Expand Down
27 changes: 13 additions & 14 deletions common/src/riscv/instruction.rs
Original file line number Diff line number Diff line change
Expand Up @@ -72,8 +72,7 @@ impl Instruction {
// I-type instruction with shamt has 5 bits for shamt.
debug_assert!(
op_c <= 0x1F,
"op_c must be in the range [0..32), got {}",
op_c
"op_c must be in the range [0..32), got {op_c}"
);
}

Expand Down Expand Up @@ -199,7 +198,7 @@ impl Instruction {
let rd = self.op_a;
let rs1 = self.op_b;
let rs2 = Register::from(self.op_c as u8);
format!("{} {}, {}, {}", opcode, rd, rs1, rs2)
format!("{opcode} {rd}, {rs1}, {rs2}")
}

fn i_type_to_string(&self, opcode: BuiltinOpcode) -> String {
Expand All @@ -210,51 +209,51 @@ impl Instruction {
BuiltinOpcode::EBREAK | BuiltinOpcode::ECALL => self.opcode.to_string(),
BuiltinOpcode::JALR => match (rd, rs1, imm12) {
(Register::X0, Register::X1, 0) => "ret".to_string(),
(Register::X0, _, 0) => format!("jr {}", rs1),
(Register::X0, _, 0) => format!("jr {rs1}"),
(Register::X1, _, 0) => format!("{} {}", self.opcode, rs1),
_ => format!("{} {}, {}, {}", opcode, rd, rs1, imm12),
_ => format!("{opcode} {rd}, {rs1}, {imm12}"),
},
BuiltinOpcode::ADDI => match (rd, rs1, imm12) {
(Register::X0, Register::X0, 0) => "nop".to_string(),
(_, Register::X0, _) => format!("li {}, {}", rd, imm12),
(_, _, 0) => format!("mv {}, {}", rd, rs1),
_ => format!("{} {}, {}, {}", opcode, rd, rs1, imm12),
(_, Register::X0, _) => format!("li {rd}, {imm12}"),
(_, _, 0) => format!("mv {rd}, {rs1}"),
_ => format!("{opcode} {rd}, {rs1}, {imm12}"),
},
BuiltinOpcode::LB
| BuiltinOpcode::LH
| BuiltinOpcode::LW
| BuiltinOpcode::LBU
| BuiltinOpcode::LHU => {
format!("{} {}, {}({})", opcode, rd, imm12, rs1)
format!("{opcode} {rd}, {imm12}({rs1})")
}
_ => format!("{} {}, {}, {}", opcode, rd, rs1, imm12),
_ => format!("{opcode} {rd}, {rs1}, {imm12}"),
}
}

fn s_type_to_string(&self, opcode: BuiltinOpcode) -> String {
let rs1 = self.op_a;
let rs2 = self.op_b;
let imm12 = self.op_c as i32;
format!("{} {}, {}({})", opcode, rs2, imm12, rs1)
format!("{opcode} {rs2}, {imm12}({rs1})")
}

fn b_type_to_string(&self, opcode: BuiltinOpcode) -> String {
let rs1 = self.op_a;
let rs2 = self.op_b;
let imm12 = self.op_c as i32;
format!("{} {}, {}, 0x{:x}", opcode, rs1, rs2, imm12)
format!("{opcode} {rs1}, {rs2}, 0x{imm12:x}")
}

fn u_type_to_string(&self, opcode: BuiltinOpcode) -> String {
let rd = self.op_a;
let imm20 = self.op_c;
format!("{} {}, 0x{:x}", opcode, rd, imm20)
format!("{opcode} {rd}, 0x{imm20:x}")
}

fn j_type_to_string(&self, opcode: BuiltinOpcode) -> String {
let rd = self.op_a;
let imm20 = self.op_c as i32;
format!("{} {}, 0x{:x}", opcode, rd, imm20)
format!("{opcode} {rd}, 0x{imm20:x}")
}

// Encode the instruction struct to binary representation.
Expand Down
5 changes: 2 additions & 3 deletions common/src/riscv/register.rs
Original file line number Diff line number Diff line change
Expand Up @@ -188,8 +188,7 @@ mod tests {
assert_eq!(
reg.abi_name(),
abi_names[i as usize],
"Mismatch for register X{}",
i
"Mismatch for register X{i}"
);
}
}
Expand All @@ -199,7 +198,7 @@ mod tests {
for i in 0..32 {
let reg = Register::from(i);
assert_eq!(
format!("{}", reg),
format!("{reg}"),
reg.abi_name(),
"Display mismatch for register X{}",
i
Expand Down
3 changes: 1 addition & 2 deletions prover/src/chips/instructions/i/syscall.rs
Original file line number Diff line number Diff line change
Expand Up @@ -71,8 +71,7 @@ impl MachineChip for SyscallChip {
(0x405, None) => traces.fill_columns(row_idx, true, Column::IsSysMemoryAdvise),
_ => {
panic!(
"Unknown syscall number: 0x{:x} and result: {:?}, on row {}",
syscall_number, result, row_idx
"Unknown syscall number: 0x{syscall_number:x} and result: {result:?}, on row {row_idx}"
);
}
};
Expand Down
4 changes: 2 additions & 2 deletions prover/src/chips/instructions/m/nexani.rs
Original file line number Diff line number Diff line change
Expand Up @@ -173,7 +173,7 @@ pub(super) fn mull_limb(b: u32, c: u32) -> MulResult {
let (a23, carry_1) = (a23 as u16, (a23 >> 16));

// Verify our calculations match the built-in multiplication
assert!(carry_1 < 5, "Carry_1 exceeds expected bounds {}", carry_1);
assert!(carry_1 < 5, "Carry_1 exceeds expected bounds {carry_1}");
assert_eq!(
a01.to_le_bytes(),
[a_l_bytes[0], a_l_bytes[1]],
Expand Down Expand Up @@ -217,7 +217,7 @@ pub(super) fn mull_limb(b: u32, c: u32) -> MulResult {
.wrapping_add((c3_prime_prime) << 8);
let (a45, carry_2) = (a45 as u16, (a45 >> 16));

assert!(carry_2 < 4, "Carry_2 exceeds expected bounds {}", carry_2);
assert!(carry_2 < 4, "Carry_2 exceeds expected bounds {carry_2}");

// Bytes 6-7 of the final result
let a67 = (z3 as u32)
Expand Down
5 changes: 1 addition & 4 deletions prover/src/chips/memory_check/register_mem_check.rs
Original file line number Diff line number Diff line change
Expand Up @@ -412,10 +412,7 @@ fn fill_prev_values(
let cur_value = u32::from_base_fields(reg_value);
assert!(
reg_idx != 0 || cur_value == 0,
"writing non-zero to X0, reg_idx: {}, cur_value: {}, row_idx: {}",
reg_idx,
cur_value,
row_idx
"writing non-zero to X0, reg_idx: {reg_idx}, cur_value: {cur_value}, row_idx: {row_idx}"
);
let AccessResult {
prev_timestamp,
Expand Down
2 changes: 1 addition & 1 deletion prover/src/chips/range_check/range128.rs
Original file line number Diff line number Diff line change
Expand Up @@ -189,7 +189,7 @@ fn fill_main_col(value_col: BaseField, selector_col: BaseField, side_note: &mut
}
let checked = value_col.0;
#[cfg(not(test))] // Tests need to go past this assertion and break constraints.
assert!(checked < 128, "value is out of range {}", checked);
assert!(checked < 128, "value is out of range {checked}");
side_note.range128.multiplicity[checked as usize] += 1;
}

Expand Down
7 changes: 2 additions & 5 deletions prover/src/chips/range_check/range16.rs
Original file line number Diff line number Diff line change
Expand Up @@ -272,10 +272,7 @@ fn fill_main_for_type<VC: VirtualColumn<1>>(
let [is_type] = VC::read_from_traces_builder(traces, row_idx);
!is_type.is_zero()
},
"ProgramStep and the TraceBuilder seem to disagree which type of instruction is being processed at row {}; step: {:?}, instruction_type: {:?}",
row_idx,
step,
instruction_type,
"ProgramStep and the TraceBuilder seem to disagree which type of instruction is being processed at row {row_idx}; step: {step:?}, instruction_type: {instruction_type:?}",
);
if step_is_of_type {
for col in columns.iter() {
Expand All @@ -288,7 +285,7 @@ fn fill_main_for_type<VC: VirtualColumn<1>>(
fn fill_main_elm(col: BaseField, side_note: &mut SideNote) {
let checked = col.0;
#[cfg(not(test))] // Tests need to go past this assertion and break constraints.
assert!(checked < 16, "value is out of range {}", checked);
assert!(checked < 16, "value is out of range {checked}");
side_note.range16.multiplicity[checked as usize] += 1;
}

Expand Down
2 changes: 1 addition & 1 deletion prover/src/chips/range_check/range256.rs
Original file line number Diff line number Diff line change
Expand Up @@ -263,7 +263,7 @@ fn fill_main_cols<const N: usize>(value_col: [BaseField; N], side_note: &mut Sid
for (_limb_index, limb) in value_col.iter().enumerate() {
let checked = limb.0;
#[cfg(not(test))] // Tests need to go past this assertion and break constraints.
assert!(checked < 256, "value[{}] is out of range", _limb_index);
assert!(checked < 256, "value[{_limb_index}] is out of range");
side_note.range256.multiplicity[checked as usize] += 1;
}
}
Expand Down
2 changes: 1 addition & 1 deletion prover/src/chips/range_check/range32.rs
Original file line number Diff line number Diff line change
Expand Up @@ -105,7 +105,7 @@ impl MachineChip for Range32Chip {
fn fill_main_elm(col: BaseField, side_note: &mut SideNote) {
let checked = col.0;
#[cfg(not(test))] // Tests need to go past this assertion and break constraints.
assert!(checked < 32, "value is out of range {}", checked);
assert!(checked < 32, "value is out of range {checked}");
side_note.range32.multiplicity[checked as usize] += 1;
}

Expand Down
7 changes: 2 additions & 5 deletions prover/src/chips/range_check/range8.rs
Original file line number Diff line number Diff line change
Expand Up @@ -281,10 +281,7 @@ fn fill_main_for_type<VC: VirtualColumn<1>>(
let [is_type] = VC::read_from_traces_builder(traces, row_idx);
!is_type.is_zero()
},
"ProgramStep and the TraceBuilder seem to disagree which type of instruction is being processed at row {}; step: {:?}, instruction_type: {:?}",
row_idx,
step,
instruction_type,
"ProgramStep and the TraceBuilder seem to disagree which type of instruction is being processed at row {row_idx}; step: {step:?}, instruction_type: {instruction_type:?}",
);
if step_is_of_type {
for col in columns.iter() {
Expand All @@ -297,6 +294,6 @@ fn fill_main_for_type<VC: VirtualColumn<1>>(
fn fill_main_elm(col: BaseField, side_note: &mut SideNote) {
let checked = col.0;
#[cfg(not(test))] // Tests need to go past this assertion and break constraints.
assert!(checked < 8, "value is out of range {}", checked);
assert!(checked < 8, "value is out of range {checked}");
side_note.range8.multiplicity[checked as usize] += 1;
}
2 changes: 1 addition & 1 deletion prover/src/extensions/multiplicity.rs
Original file line number Diff line number Diff line change
Expand Up @@ -95,7 +95,7 @@ impl<const LEN: usize> RangeValues<LEN> {

pub fn id(&self) -> PreProcessedColumnId {
PreProcessedColumnId {
id: format!("preprocessed_range_values_{}", LEN),
id: format!("preprocessed_range_values_{LEN}"),
}
}
}
Expand Down
8 changes: 3 additions & 5 deletions prover/src/extensions/ram_init_final.rs
Original file line number Diff line number Diff line change
Expand Up @@ -62,7 +62,7 @@ impl FrameworkEval for RamInitFinalEval {
// Retrieve all preprocessed columns in the same order as generated
let preprocessed_ram_addr: Vec<E::F> = (0..WORD_SIZE)
.map(|i| {
let col_id = format!("preprocessed_ram_init_final_addr{}", i);
let col_id = format!("preprocessed_ram_init_final_addr{i}");
eval.get_preprocessed_column(PreProcessedColumnId { id: col_id })
})
.collect();
Expand Down Expand Up @@ -504,7 +504,7 @@ impl RamInitFinal {
ret.push(base_column);
});
ret.iter().enumerate().for_each(|(i, col)| {
assert_eq!(col.length, num_rows, "{}th element has wrong length", i);
assert_eq!(col.length, num_rows, "{i}th element has wrong length");
});
assert!(ret.len() == 2 * WORD_SIZE + 2);
ret
Expand Down Expand Up @@ -657,9 +657,7 @@ impl RamInitFinal {
#[cfg(not(test))]
assert!(
checked < 256,
"final value {} out of range at index {}",
checked,
_i
"final value {checked} out of range at index {_i}"
);
side_note.range256.multiplicity[checked as usize] += 1;
}
Expand Down
2 changes: 1 addition & 1 deletion runtime/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -8,7 +8,7 @@ fn main() {

let linker_script_path = "./linker-scripts/default.x";
let linker_script_bytes = fs::read(linker_script_path).unwrap();
println!("cargo:rerun-if-changed={}", linker_script_path);
println!("cargo:rerun-if-changed={linker_script_path}");

let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap());
fs::write(out_dir.join("link.x"), linker_script_bytes).unwrap();
Expand Down
2 changes: 1 addition & 1 deletion rust-toolchain.toml
Original file line number Diff line number Diff line change
@@ -1,2 +1,2 @@
[toolchain]
channel = "nightly-2025-04-06"
channel = "nightly-2025-05-09"
6 changes: 3 additions & 3 deletions sdk/README.md
Original file line number Diff line number Diff line change
Expand Up @@ -17,13 +17,13 @@ $ rustup target add riscv32im-unknown-none-elf
Then, install the Nexus zkVM:

```shell
$ rustup run nightly-2025-04-06 cargo install --git https://github.com/nexus-xyz/nexus-zkvm cargo-nexus --tag 'v0.3.5'
$ rustup run nightly-2025-05-09 cargo install --git https://github.com/nexus-xyz/nexus-zkvm cargo-nexus --tag 'v0.3.5'
```

And verify the installation:

```shell
$ rustup run nightly-2025-04-06 cargo nexus --help
$ rustup run nightly-2025-05-09 cargo nexus --help
```

This should print the available CLI commands. At present, the `cargo nexus` CLI is minimal, providing just a `cargo nexus host` command to setup an SDK based project.
Expand All @@ -33,7 +33,7 @@ This should print the available CLI commands. At present, the `cargo nexus` CLI
To use the zkVM programmatically, we need two programs: a _guest_ program that runs on the zkVM, and a _host_ program that operates the zkVM itself. Run:

```shell
$ rustup run nightly-2025-04-06 cargo nexus host nexus-host
$ rustup run nightly-2025-05-09 cargo nexus host nexus-host
```

This will create a new Rust project directory with the following structure:
Expand Down
6 changes: 3 additions & 3 deletions vm/build.rs
Original file line number Diff line number Diff line change
Expand Up @@ -66,9 +66,9 @@ fn main() {
let two_precompiles_path = built_bin_dir.join(TWO_PRECOMPILES_NAME);
let no_precompiles_path = built_bin_dir.join(NO_PRECOMPILES_NAME);

let one_precompile_dest = test_dir.join(format!("{}.elf", ONE_PRECOMPILE_NAME));
let two_precompiles_dest = test_dir.join(format!("{}.elf", TWO_PRECOMPILES_NAME));
let no_precompiles_dest = test_dir.join(format!("{}.elf", NO_PRECOMPILES_NAME));
let one_precompile_dest = test_dir.join(format!("{ONE_PRECOMPILE_NAME}.elf"));
let two_precompiles_dest = test_dir.join(format!("{TWO_PRECOMPILES_NAME}.elf"));
let no_precompiles_dest = test_dir.join(format!("{NO_PRECOMPILES_NAME}.elf"));

std::fs::copy(one_precompile_path, one_precompile_dest).unwrap();
std::fs::copy(two_precompiles_path, two_precompiles_dest).unwrap();
Expand Down
Loading