Add host to PS DMA proof of concept driver and app#54
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| dma->eventfd = NULL; | ||
| WRITE_ONCE(dma->last_isr_ns, 0); | ||
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| /* Get IRQ declared on this device node. With gpio-xilinx removed, this |
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Why are we taking control of the whole GPIO block ourselves instead of getting the irq through gpio-xilinx?
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That is a quirk of the way we did the PL. Since we don't have a digital engineer helping currently, we took the easiest path to generate interrupts from register writes by dropping the axi gpio block on the vivado block diagram and configuring it to generate our interrupts. This means the only reason the axi gpio blocks are in our design at all is to support this module and it made sense to keep the modules ownership of them directly.
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This means the only reason the axi gpio blocks are in our design at all is to support this module and it made sense to keep the modules ownership of them directly.
You have no other gpio? No reset lines? No LEDs?
gpio-xilinx should work as a interrupt source; you should be able to set the gpio device as an interrupt-parent, and then you can enable_irq/disable_irq through the irq APIs. I don't think your driver should be poking the GPIO registers directly.
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OK I see. I thought this only covered the AXI GPIO block I added to the design which ideally would be custom interrupt mailbox for the DMA messages if I knew how to digital engineer. Let me see if I can get the interrupts from the GPIO driver working.
| /* | ||
| * This kernel module supports a proof-of-concept data path where the host DMA | ||
| * engine transfers data for consumption by the PS userspace demo application | ||
| * host-arm-dma-wait. The module receives PL interrupts when a DMA transaction | ||
| * is ready to process, then notifies userspace through an eventfd registered | ||
| * via a custom ioctl for lower-latency signaling. After processing, userspace | ||
| * writes back to this device node to signal to the host that processing is | ||
| * complete. | ||
| */ |
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Out of curiosity, have you looked at the UIO framework, in particular, the uio_dmem_genirq driver? This feels similar.
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Neat. This would be good to try and see if there are any performance differences. I'll look into it but stick with the traditional kernel module for this review if that is OK.
Add our proof of concept demonstration sending packets of information to a waiting PS user application from the host via QDMA over PCIe. A kernel module handles interrupts to and from the PL and notifies the user appliction for new transactions. A user mode application waits on events, reads data out, then notifies the kernel the transaction is complete. Signed-off-by: Andy Kerr <andy.kerr@emerson.com>
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Add our proof of concept demonstration sending packets of information to a waiting PS user application from the host via QDMA over PCIe. A kernel module handles interrupts to and from the PL and notifies the user appliction for new transactions.
A user mode application waits on events, reads data out, then notifies the kernel the transaction is complete.