app: Add nRF91M1 overlay for pin configuration

app/overlay-nrf91m1.overlay

@@ -0,0 +1,82 @@
+/*
+ * Copyright (c) 2026 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/* AT command UART */
+&uart0 {
+	compatible = "nordic,nrf-uarte";
+	current-speed = <115200>;
+	hw-flow-control;
+	status = "okay";
+
+	dtr_uart0: dtr-uart {
+		compatible = "nordic,dtr-uart";
+		dtr-gpios = <&gpio0 31 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>; /* 9151 SiP LGA pin: 50 */
+		ri-gpios = <&gpio0 30 GPIO_ACTIVE_LOW>; /* 9151 SiP LGA pin: 49 */
+		status = "okay";
+	};
+	pinctrl-0 = <&uart0_default_nrf91m1>;
+	pinctrl-1 = <&uart0_sleep_nrf91m1>;
+	pinctrl-names = "default", "sleep";
+};
+
+&gpio0 {
+	status = "okay";
+	/* Use PORT event for DTR (31) pin to save power */
+	sense-edge-mask = <0x80000000>;
+};
+
+/* Log / Trace UART */
+&uart1 {
+	pinctrl-0 = <&uart1_default_nrf91m1>;
+	pinctrl-1 = <&uart1_sleep_nrf91m1>;
+	pinctrl-names = "default", "sleep";
+};
+
+&pinctrl {
+	uart0_default_nrf91m1: uart0_default_nrf91m1 {
+		group1 {
+			psels = <NRF_PSEL(UART_RX, 0, 26)>; /* 9151 SiP LGA pin: 44 */
+			bias-pull-up;
+		};
+		group2 {
+			psels = <NRF_PSEL(UART_CTS, 0, 15)>; /* 9151 SiP LGA pin: 75 */
+			bias-pull-down;
+		};
+		group3 {
+			psels = <NRF_PSEL(UART_TX, 0, 27)>, /* 9151 SiP LGA pin: 45 */
+				<NRF_PSEL(UART_RTS, 0, 14)>; /* 9151 SiP LGA pin: 74 */
+		};
+	};
+
+	uart0_sleep_nrf91m1: uart0_sleep_nrf91m1 {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 27)>,
+				<NRF_PSEL(UART_RX, 0, 26)>,
+				<NRF_PSEL(UART_RTS, 0, 14)>,
+				<NRF_PSEL(UART_CTS, 0, 15)>;
+			low-power-enable;
+		};
+	};
+
+	uart1_default_nrf91m1: uart1_default_nrf91m1 {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 29)>; /* 9151 SiP LGA pin: 48 */
+		};
+
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 0, 28)>; /* 9151 SiP LGA pin: 47 (floating) */
+			bias-pull-up;
+		};
+	};
+
+	uart1_sleep_nrf91m1: uart1_sleep_nrfnrf91m1 {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 0, 29)>,
+				<NRF_PSEL(UART_RX, 0, 28)>;
+			low-power-enable;
+		};
+	};
+};

app/sample.yaml

@@ -1,6 +1,14 @@
 sample:
   name: Serial Modem
 tests:
+  serial_modem.nrf91m1:
+    sysbuild: true
+    build_only: true
+    extra_args:
+      - EXTRA_CONF_FILE="overlay-cmux.conf;overlay-ppp.conf"
+      - EXTRA_DTC_OVERLAY_FILE="overlay-nrf91m1.overlay"
+    platform_allow:
+      - nrf9151dk/nrf9151/ns
   serial_modem.default:
     sysbuild: true
     build_only: true

doc/app/sm_configuration.rst

@@ -274,6 +274,10 @@ The following configuration files are provided:
   The overlay is pin compatible with nRF9151DK.
   For other setups, you can customize the overlay to fit your configuration.
 
+* :file:`overlay-nrf91m1.overlay` - Devicetree overlay for use with the nRF91M1 SiP.
+  Configures ``uart0`` and ``uart1`` with pins suitable for nRF9151 DK usage and for connecting to an external MCU.
+  See :ref:`uart_configuration_nrf91m1` for pin details.
+
 * :file:`overlay-carrier.conf` - Configuration file that adds |NCS| `LwM2M carrier`_ support.
   See :ref:`sm_carrier_library_support` for more information on how to connect to an operator's device management platform.
 

doc/links.txt

@@ -17,6 +17,7 @@
 .. _`nRF91 DK`: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf91/index.html#ug-nrf91
 .. _`nrf9151dk`: https://docs.nordicsemi.com/bundle/ncs-latest/page/zephyr/boards/nordic/nrf9151dk/doc/index.html#nrf9151dk
 .. _`nRF9151 Product Specification`: https://docs.nordicsemi.com/bundle/ps_nrf9151/page/nRF9151_html5_keyfeatures.html
+.. _`nRF9151 LGA pin assignments`: https://docs.nordicsemi.com/bundle/ps_nrf9151/page/pin.html#ariaid-title2
 .. _`Thingy91x_firmware_update`: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/thingy91x/thingy91x_updating_fw_programmer.html#updating_the_firmware_on_the_nrf5340_soc
 .. _`shared TF-M logging`: https://docs.nordicsemi.com/bundle/ncs-latest/page/nrf/app_dev/device_guides/nrf91/nrf91_snippet.html#tfm-enable-share-uart
 

doc/uart_configuration.rst

@@ -163,6 +163,69 @@ The following tables shows how to connect the UART pins to the corresponding pin
       The RI pin is connected to the blue LED, which is used to indicate incoming data.
 
 
+.. _uart_configuration_nrf91m1:
+
+nRF91M1 pre-programmed |SM| application
+=======================================
+
+nRF91M1 is a pre-programmed nRF9151 SiP that runs the |SM| application out of the box.
+
+The pin mapping of the nRF91M1 follows the `nrf9151dk`_ board configuration.
+You can flash the nRF91M1 software to the `nrf9151dk`_ board for development and testing purposes.
+
+The following table shows how to connect the UART pins to the corresponding pins on the nRF91M1 SiP:
+
+.. list-table::
+   :header-rows: 1
+
+   * - Signal
+     - `nrf9151dk`_
+     - `nRF9151 LGA pin assignments`_
+   * - UART0 TX
+     - P0.27
+     - 45
+   * - UART0 RX
+     - P0.26 (pull-up)
+     - 44 (pull-up)
+   * - UART0 RTS
+     - P0.14
+     - 74
+   * - UART0 CTS
+     - P0.15 (pull-down)
+     - 75 (pull-down)
+   * - UART0 DTR
+     - P0.31 (active low, pull-up) (Wire to GND to power on the UART0)
+     - 50 (active low, pull-up)
+   * - UART0 RI
+     - P0.30 (active low)
+     - 49 (active low)
+   * - UART1 TX
+     - P0.29
+     - 48
+
+**AT UART:**
+
+* UART instance: UART0 (VCOM0)
+* Baud rate: 115200
+* Hardware flow control: Enabled
+
+**Log / Trace UART:**
+
+* UART instance: UART1 (VCOM1)
+* Baud rate: 1000000
+* Hardware flow control: Disabled
+
+.. important::
+   When working with the `nrf9151dk`_ board with a PC host, the **DTR** pin must be wired to **GND** to power on the UART0.
+   Currently, you must use a physical jumper wire, but in the future, the `Board Configurator app`_ can be used.
+
+By default in the `nrf9151dk`_ board, the UART0 is routed to VCOM0 on the interface chip, and UART1 is routed to VCOM1 on the interface chip.
+This allows the `nrf9151dk`_ board to be used with a PC host for development and testing.
+
+When working with `nrf9151dk`_ board with an external MCU host, you must disable VCOM0 and VCOM1 in the `Board Configurator app`_ to release the UART pins for external use.
+
+This setup is provided in the :file:`app/overlay-nrf91m1.overlay` devicetree overlay file.
+
 Host application
 ================