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applications: nrf_desktop: nrf54lm20dk: support USB 8k report rate
Added two nRF54LM20 DK configurations to the nRF Desktop application that improve the HID report rate performance over USB by executing application code from RAM. Due to this change, the application can now consistently maintain the 8000Hz report rate in the "release_ram_load" configuration variant. The second configuration variant called "ram_load" is used for debugging purposes. To execute code from RAM, the MCUboot has been configured for the RAM load mode. In this mode, the bootloader copies the newer application image from one of two RRAM slots into the RAM region and then it starts the application from RAM. To support RAM load mode of the MCUboot bootloader, devicetree (DTS) is used as a partitioning method. Currently, the default partitioning method for the nRF54LM20DK via the Partition Manager (PM) is not properly supported in the RAM load mode. Ref: NCSDK-35506 Signed-off-by: Aleksander Strzebonski <[email protected]> Signed-off-by: Kamil Piszczek <[email protected]>
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‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/app.overlay‎

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#include "app_common.dtsi"
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = < 0x0 DT_SIZE_K(2036) >;
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};
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/ {
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/app_common.dtsi‎

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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = < 0x0 DT_SIZE_K(2036) >;
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};
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/ {
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/* Disable pwmleds and redefine them to align configuration with CAF LEDs requirements. */
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/delete-node/ pwmleds;

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/app_llvm.overlay‎

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#include "app_common.dtsi"
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = < 0x0 DT_SIZE_K(2036) >;
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};
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/ {
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/app_ram_load.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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#include "memory_map_ram_load.dtsi"
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/ {
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chosen {
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/* We need to point where we want to place the retained memory region that
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* is shared with the MCUboot bootloader image and contains the image metadata.
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*/
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zephyr,bootloader-info = &boot_info0;
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};
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/app_release.overlay‎

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#include "app_common.dtsi"
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = < 0x0 DT_SIZE_K(2036) >;
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};
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/ {
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/app_release_ram_load.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "app_common.dtsi"
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#include "memory_map_ram_load.dtsi"
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/ {
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chosen {
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/* We need to point where we want to place the retained memory region that
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* is shared with the MCUboot bootloader image and contains the image metadata.
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*/
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zephyr,bootloader-info = &boot_info0;
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};
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hid_dev_0: hid_dev_0 {
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compatible = "zephyr,hid-device";
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label = "HID0";
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protocol-code = "mouse";
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in-polling-period-us = <125>;
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in-report-size = <64>;
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};
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};
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/* For nRF54L, watchdog status is disabled by default. Needs to be enabled in DTS overlay. */
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&wdt31 {
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status = "okay";
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};

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/images/mcuboot/app_llvm.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = < 0x0 DT_SIZE_K(2036) >;
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};

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/images/mcuboot/app_ram_load.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "../../memory_map_ram_load.dtsi"
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/ {
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chosen {
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/* We need to point where we want to place MCUboot code. */
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zephyr,code-partition = &boot_partition;
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/* We need to point where we want to place MCUboot RAM region. */
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zephyr,sram = &cpuapp_sram_mcuboot_ram_region;
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/* We need to point where we want to place the retained memory region that
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* is shared with the application image and contains the image metadata.
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*/
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zephyr,bootloader-info = &boot_info0;
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};
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};

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/images/mcuboot/app_release.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
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&cpuapp_rram {
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reg = < 0x0 DT_SIZE_K(2036) >;
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};

‎applications/nrf_desktop/configuration/nrf54lm20dk_nrf54lm20a_cpuapp/images/mcuboot/app_release_ram_load.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include "../../memory_map_ram_load.dtsi"
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/ {
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chosen {
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/* We need to point where we want to place MCUboot code. */
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zephyr,code-partition = &boot_partition;
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/* We need to point where we want to place MCUboot RAM region. */
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zephyr,sram = &cpuapp_sram_mcuboot_ram_region;
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/* We need to point where we want to place the retained memory region that
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* is shared with the application image and contains the image metadata.
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*/
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zephyr,bootloader-info = &boot_info0;
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};
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};

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