Nrfx 4 ci check

applications/connectivity_bridge/prj.conf

@@ -71,11 +71,9 @@ CONFIG_UART_1_NRF_HW_ASYNC=y
 CONFIG_UART_0_NRF_HW_ASYNC_TIMER=1
 CONFIG_UART_1_NRF_HW_ASYNC_TIMER=2
 CONFIG_UART_USE_RUNTIME_CONFIGURE=y
-CONFIG_NRFX_UARTE0=y
-CONFIG_NRFX_UARTE1=y
-CONFIG_NRFX_TIMER1=y
-CONFIG_NRFX_TIMER2=y
-CONFIG_NRFX_PPI=y
+CONFIG_NRFX_UARTE=y
+CONFIG_NRFX_TIMER=y
+CONFIG_NRFX_GPPI=y
 
 CONFIG_HW_ID_LIBRARY=y
 CONFIG_RESET_ON_FATAL_ERROR=y

applications/nrf5340_audio/Kconfig.defaults

@@ -48,7 +48,7 @@ config REGULATOR
 config CONTIN_ARRAY
 	default y
 
-config NRFX_I2S0
+config NRFX_I2S
 	default y
 
 config PCM_MIX

applications/nrf5340_audio/src/audio/Kconfig.defaults

@@ -5,9 +5,9 @@
 #
 
 # Audio sync timer
-config NRFX_TIMER1
+config NRFX_TIMER
 	default y
 
 # Audio sync timer
-config NRFX_DPPI
+config NRFX_GPPI
 	default y

applications/nrf5340_audio/src/modules/audio_i2s.c

@@ -36,7 +36,7 @@ PINCTRL_DT_DEFINE(I2S_NL);
 #error "Current AUDIO_SAMPLE_RATE_HZ setting not supported"
 #endif
 
-static nrfx_i2s_t i2s_inst = NRFX_I2S_INSTANCE(0);
+static nrfx_i2s_t i2s_inst = NRFX_I2S_INSTANCE(NRF_I2S0);
 
 static nrfx_i2s_config_t cfg = {
 	/* Pins are configured by pinctrl. */
@@ -46,8 +46,11 @@ static nrfx_i2s_config_t cfg = {
 	.mode = NRF_I2S_MODE_MASTER,
 	.format = NRF_I2S_FORMAT_I2S,
 	.alignment = NRF_I2S_ALIGN_LEFT,
-	.ratio = I2S_RATIO,
-	.mck_setup = 0x66666000,
+	.prescalers = {
+		.ratio = I2S_RATIO,
+		.mck_setup = 0x66666000,
+		.enable_bypass = false,
+	},
 #if (CONFIG_AUDIO_BIT_DEPTH_16)
 	.sample_width = NRF_I2S_SWIDTH_16BIT,
 #elif (CONFIG_AUDIO_BIT_DEPTH_32)
@@ -57,7 +60,6 @@ static nrfx_i2s_config_t cfg = {
 #endif /* (CONFIG_AUDIO_BIT_DEPTH_16) */
 	.channels = NRF_I2S_CHANNELS_STEREO,
 	.clksrc = NRF_I2S_CLKSRC_ACLK,
-	.enable_bypass = false,
 };
 
 static i2s_blk_comp_callback_t i2s_blk_comp_callback;
@@ -148,7 +150,7 @@ void audio_i2s_init(void)
 	ret = pinctrl_apply_state(PINCTRL_DT_DEV_CONFIG_GET(I2S_NL), PINCTRL_STATE_DEFAULT);
 	__ASSERT_NO_MSG(ret == 0);
 
-	IRQ_CONNECT(DT_IRQN(I2S_NL), DT_IRQ(I2S_NL, priority), nrfx_isr, nrfx_i2s_0_irq_handler, 0);
+	IRQ_CONNECT(DT_IRQN(I2S_NL), DT_IRQ(I2S_NL, priority), nrfx_i2s_irq_handler, &i2s_inst, 0);
 	irq_enable(DT_IRQN(I2S_NL));
 
 	ret = nrfx_i2s_init(&i2s_inst, &cfg, i2s_comp_handler);

applications/nrf5340_audio/src/modules/audio_sync_timer.c

@@ -8,7 +8,7 @@
 
 #include <zephyr/kernel.h>
 #include <zephyr/init.h>
-#include <nrfx_dppi.h>
+#include <helpers/nrfx_gppi.h>
 #include <nrfx_i2s.h>
 #include <nrfx_ipc.h>
 #include <nrfx_rtc.h>
@@ -28,10 +28,10 @@ LOG_MODULE_REGISTER(audio_sync_timer, CONFIG_AUDIO_SYNC_TIMER_LOG_LEVEL);
 #define AUDIO_SYNC_HF_TIMER_CURR_TIME_CAPTURE_CHANNEL		1
 #define AUDIO_SYNC_HF_TIMER_CURR_TIME_CAPTURE			NRF_TIMER_TASK_CAPTURE1
 
-static const nrfx_timer_t audio_sync_hf_timer_instance =
-	NRFX_TIMER_INSTANCE(AUDIO_SYNC_HF_TIMER_INSTANCE_NUMBER);
+static nrfx_timer_t audio_sync_hf_timer_instance =
+	NRFX_TIMER_INSTANCE(NRF_TIMER_INST_GET(AUDIO_SYNC_HF_TIMER_INSTANCE_NUMBER));
 
-static uint8_t dppi_channel_i2s_frame_start;
+static nrfx_gppi_handle_t dppi_handle_i2s_frame_start;
 
 #define AUDIO_SYNC_LF_TIMER_INSTANCE_NUMBER 0
 
@@ -41,15 +41,15 @@ static uint8_t dppi_channel_i2s_frame_start;
 #define AUDIO_SYNC_LF_TIMER_CURR_TIME_CAPTURE			NRF_RTC_TASK_CAPTURE_1
 #define CC_GET_CALLS_MAX					20
 
-static uint8_t dppi_channel_curr_time_capture;
+static nrfx_gppi_handle_t dppi_handle_curr_time_capture;
 
 static const nrfx_rtc_config_t rtc_cfg = NRFX_RTC_DEFAULT_CONFIG;
 
 static const nrfx_rtc_t audio_sync_lf_timer_instance =
 	NRFX_RTC_INSTANCE(AUDIO_SYNC_LF_TIMER_INSTANCE_NUMBER);
 
-static uint8_t dppi_channel_timer_sync_with_rtc;
-static uint8_t dppi_channel_rtc_start;
+static nrfx_gppi_handle_t dppi_handle_timer_sync_with_rtc;
+static nrfx_gppi_handle_t dppi_handle_rtc_start;
 static volatile uint32_t num_rtc_overflows;
 
 static nrfx_timer_config_t cfg = {.frequency = NRFX_MHZ_TO_HZ(1UL),
@@ -173,17 +173,17 @@ static void rtc_isr_handler(nrfx_rtc_int_type_t int_type)
  */
 static int audio_sync_timer_init(void)
 {
-	nrfx_err_t ret;
-	nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);
+	int ret;
+	uint32_t eep0, tep0, tep1;
 
 	ret = nrfx_timer_init(&audio_sync_hf_timer_instance, &cfg, unused_timer_isr_handler);
-	if (ret - NRFX_ERROR_BASE_NUM) {
+	if (ret < 0) {
 		LOG_ERR("nrfx timer init error: %d", ret);
 		return -ENODEV;
 	}
 
 	ret = nrfx_rtc_init(&audio_sync_lf_timer_instance, &rtc_cfg, rtc_isr_handler);
-	if (ret - NRFX_ERROR_BASE_NUM) {
+	if (ret < 0) {
 		LOG_ERR("nrfx rtc init error: %d", ret);
 		return -ENODEV;
 	}
@@ -192,92 +192,61 @@ static int audio_sync_timer_init(void)
 	nrfx_rtc_overflow_enable(&audio_sync_lf_timer_instance, true);
 
 	/* Initialize capturing of I2S frame start event timestamps */
-	ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_i2s_frame_start);
-	if (ret - NRFX_ERROR_BASE_NUM) {
+	eep0 = nrf_i2s_event_address_get(NRF_I2S0, NRF_I2S_EVENT_FRAMESTART);
+	tep0 = nrfx_rtc_task_address_get(&audio_sync_lf_timer_instance,
+			AUDIO_SYNC_LF_TIMER_I2S_FRAME_START_EVT_CAPTURE);
+	tep1 = nrfx_timer_task_address_get(&audio_sync_hf_timer_instance,
+			AUDIO_SYNC_HF_TIMER_I2S_FRAME_START_EVT_CAPTURE);
+
+	ret = nrfx_gppi_conn_alloc(eep0, tep0, &dppi_handle_i2s_frame_start);
+	if (ret < 0) {
 		LOG_ERR("nrfx DPPI channel alloc error (I2S frame start): %d", ret);
-		return -ENOMEM;
+		return ret;
 	}
 
-	nrf_timer_subscribe_set(audio_sync_hf_timer_instance.p_reg,
-				AUDIO_SYNC_HF_TIMER_I2S_FRAME_START_EVT_CAPTURE,
-				dppi_channel_i2s_frame_start);
-
-	/* Initialize capturing of I2S frame start event timestamps at the RTC as well. */
-	nrf_rtc_subscribe_set(audio_sync_lf_timer_instance.p_reg,
-			      AUDIO_SYNC_LF_TIMER_I2S_FRAME_START_EVT_CAPTURE,
-			      dppi_channel_i2s_frame_start);
-
-	nrf_i2s_publish_set(NRF_I2S0, NRF_I2S_EVENT_FRAMESTART, dppi_channel_i2s_frame_start);
-	ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_i2s_frame_start);
-	if (ret - NRFX_ERROR_BASE_NUM) {
-		LOG_ERR("nrfx DPPI channel enable error (I2S frame start): %d", ret);
-		return -EIO;
-	}
+	nrfx_gppi_ep_attach(tep1, dppi_handle_i2s_frame_start);
+	nrfx_gppi_conn_enable(dppi_handle_i2s_frame_start);
 
 	/* Initialize capturing of current timestamps */
-	ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_curr_time_capture);
-	if (ret - NRFX_ERROR_BASE_NUM) {
+	eep0 = nrf_egu_event_address_get(NRF_EGU0, NRF_EGU_EVENT_TRIGGERED0);
+	tep0 = nrfx_rtc_task_address_get(&audio_sync_lf_timer_instance,
+			AUDIO_SYNC_LF_TIMER_CURR_TIME_CAPTURE);
+	tep1 = nrfx_timer_task_address_get(&audio_sync_hf_timer_instance,
+			AUDIO_SYNC_HF_TIMER_CURR_TIME_CAPTURE);
+
+	ret = nrfx_gppi_conn_alloc(eep0, tep0, &dppi_handle_curr_time_capture);
+	if (ret < 0) {
 		LOG_ERR("nrfx DPPI channel alloc error (I2S frame start): %d", ret);
-		return -ENOMEM;
-	}
-
-	nrf_rtc_subscribe_set(audio_sync_lf_timer_instance.p_reg,
-			      AUDIO_SYNC_LF_TIMER_CURR_TIME_CAPTURE,
-			      dppi_channel_curr_time_capture);
-
-	nrf_timer_subscribe_set(audio_sync_hf_timer_instance.p_reg,
-				AUDIO_SYNC_HF_TIMER_CURR_TIME_CAPTURE,
-				dppi_channel_curr_time_capture);
-
-	nrf_egu_publish_set(NRF_EGU0, NRF_EGU_EVENT_TRIGGERED0, dppi_channel_curr_time_capture);
-
-	ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_curr_time_capture);
-	if (ret - NRFX_ERROR_BASE_NUM) {
-		LOG_ERR("nrfx DPPI channel enable error (I2S frame start): %d", ret);
-		return -EIO;
+		return ret;
 	}
+	nrfx_gppi_ep_attach(tep1, dppi_handle_curr_time_capture);
+	nrfx_gppi_conn_enable(dppi_handle_curr_time_capture);
 
 	/* Initialize functionality for synchronization between APP and NET core */
-	ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_rtc_start);
-	if (ret - NRFX_ERROR_BASE_NUM) {
-		LOG_ERR("nrfx DPPI channel alloc error (timer clear): %d", ret);
-		return -ENOMEM;
+	eep0 = nrf_ipc_event_address_get(NRF_IPC, AUDIO_SYNC_TIMER_NET_APP_IPC_EVT);
+	tep0 = nrfx_rtc_task_address_get(&audio_sync_lf_timer_instance, NRF_RTC_TASK_CLEAR);
+	tep1 = nrfx_timer_task_address_get(&audio_sync_hf_timer_instance, NRF_TIMER_TASK_START);
+	ret = nrfx_gppi_conn_alloc(eep0, tep0, &dppi_handle_rtc_start);
+	if (ret < 0) {
+		LOG_ERR("nrfx DPPI channel alloc error (I2S frame start): %d", ret);
+		return ret;
 	}
-
-	nrf_rtc_subscribe_set(audio_sync_lf_timer_instance.p_reg, NRF_RTC_TASK_CLEAR,
-			      dppi_channel_rtc_start);
-	nrf_timer_subscribe_set(audio_sync_hf_timer_instance.p_reg, NRF_TIMER_TASK_START,
-				dppi_channel_rtc_start);
-
+	nrfx_gppi_ep_attach(tep1, dppi_handle_rtc_start);
 	nrf_ipc_receive_config_set(NRF_IPC, AUDIO_SYNC_TIMER_NET_APP_IPC_EVT_CHANNEL,
 				   NRF_IPC_CHANNEL_4);
-	nrf_ipc_publish_set(NRF_IPC, AUDIO_SYNC_TIMER_NET_APP_IPC_EVT, dppi_channel_rtc_start);
-
-	ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_rtc_start);
-	if (ret - NRFX_ERROR_BASE_NUM) {
-		LOG_ERR("nrfx DPPI channel enable error (timer clear): %d", ret);
-		return -EIO;
-	}
+	nrfx_gppi_conn_enable(dppi_handle_curr_time_capture);
 
 	/* Initialize functionality for synchronization between RTC and TIMER */
-	ret = nrfx_dppi_channel_alloc(&dppi, &dppi_channel_timer_sync_with_rtc);
-	if (ret - NRFX_ERROR_BASE_NUM) {
-		LOG_ERR("nrfx DPPI channel alloc error (timer clear): %d", ret);
-		return -ENOMEM;
+	eep0 = nrfx_rtc_event_address_get(&audio_sync_lf_timer_instance, NRF_RTC_EVENT_TICK);
+	tep0 = nrfx_timer_task_address_get(&audio_sync_hf_timer_instance, NRF_TIMER_TASK_CLEAR);
+	ret = nrfx_gppi_conn_alloc(eep0, tep0, &dppi_handle_timer_sync_with_rtc);
+	if (ret < 0) {
+		LOG_ERR("nrfx DPPI channel alloc error (I2S frame start): %d", ret);
+		return ret;
 	}
 
-	nrf_rtc_publish_set(audio_sync_lf_timer_instance.p_reg, NRF_RTC_EVENT_TICK,
-			    dppi_channel_timer_sync_with_rtc);
-	nrf_timer_subscribe_set(audio_sync_hf_timer_instance.p_reg, NRF_TIMER_TASK_CLEAR,
-				dppi_channel_timer_sync_with_rtc);
-
 	nrfx_rtc_tick_enable(&audio_sync_lf_timer_instance, false);
-
-	ret = nrfx_dppi_channel_enable(&dppi, dppi_channel_timer_sync_with_rtc);
-	if (ret - NRFX_ERROR_BASE_NUM) {
-		LOG_ERR("nrfx DPPI channel enable error (timer clear): %d", ret);
-		return -EIO;
-	}
+	nrfx_gppi_conn_enable(dppi_handle_timer_sync_with_rtc);
 
 	nrfx_rtc_enable(&audio_sync_lf_timer_instance);
 

applications/nrf5340_audio/src/utils/peripherals.c

@@ -149,7 +149,6 @@ int peripherals_init(void)
 
 	/* Use this to turn on 128 MHz clock for cpu_app */
 	ret = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, NRF_CLOCK_HFCLK_DIV_1);
-	ret -= NRFX_ERROR_BASE_NUM;
 	if (ret) {
 		return ret;
 	}

drivers/mpsl/clock_control/nrfx_clock_mpsl.c

@@ -38,6 +38,26 @@ static void mpsl_hfclk_src_callback(mpsl_clock_evt_type_t evt_type)
 	}
 }
 
+void nrfx_clock_lfclk_start(void)
+{
+	nrfx_clock_start(NRF_CLOCK_DOMAIN_LFCLK);
+}
+
+void nrfx_clock_lfclk_stop(void)
+{
+	nrfx_clock_stop(NRF_CLOCK_DOMAIN_LFCLK);
+}
+
+void nrfx_clock_hfclk_start(void)
+{
+	nrfx_clock_start(NRF_CLOCK_DOMAIN_HFCLK);
+}
+
+void nrfx_clock_hfclk_stop(void)
+{
+	nrfx_clock_stop(NRF_CLOCK_DOMAIN_HFCLK);
+}
+
 void nrfx_clock_start(nrf_clock_domain_t domain)
 {
 	switch (domain) {
@@ -81,11 +101,11 @@ void nrfx_clock_enable(void)
 
 }
 
-nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t handler)
+int nrfx_clock_init(nrfx_clock_event_handler_t handler)
 {
 	event_handler = handler;
 
-	return NRFX_SUCCESS;
+	return 0;
 }