platform: nordic_nrf: Add mramc service for nrf7120

platform/ext/target/nordic_nrf/common/core/CMakeLists.txt

@@ -37,12 +37,15 @@ if((NRF_SOC_VARIANT MATCHES "^nrf54l1[05]$") OR
   # variables keep changing so we check both to be future proof
   set(HAS_RRAMC 1)
   set(HAS_CRACEN 1)
+  set(HAS_KMU 1)
 elseif((NRF_SOC_VARIANT MATCHES nrf7120) OR (TFM_PLATFORM MATCHES "nordic\_nrf\/nrf7120dk\_nrf7120\_cpuapp") OR (PSA_API_TEST_TARGET MATCHES "nrf7120"))
   set(HAS_MRAMC 1)
   set(HAS_CRACEN 1)
+  set(HAS_KMU 1)
 else()
   set(HAS_NVMC 1)
   set(HAS_CRACEN 0)
+  set(HAS_KMU 0)
 endif()
 
 #========================= Platform dependencies ===============================#
@@ -123,6 +126,7 @@ target_sources(platform_s
         $<$<BOOL:${TEST_PSA_API}>:${CMAKE_CURRENT_SOURCE_DIR}/pal_plat_test.c>
         $<$<AND:$<BOOL:${ITS_ENCRYPTION}>,$<NOT:${HAS_CRACEN}>>:${CMAKE_CURRENT_SOURCE_DIR}/tfm_hal_its_encryption.c>
         $<$<AND:$<BOOL:${ITS_ENCRYPTION}>,$<BOOL:${HAS_CRACEN}>>:${CMAKE_CURRENT_SOURCE_DIR}/tfm_hal_its_encryption_cracen.c>
+        $<$<BOOL:${HAS_KMU}>:${HAL_NORDIC_PATH}/nrfx/drivers/src/nrfx_kmu.c>
 )
 
 if (NRF_HW_INIT_RESET_ON_BOOT)
@@ -173,6 +177,13 @@ if(TFM_NRF_SYSTEM_OFF_SERVICE)
     )
 endif()
 
+if(TFM_NRF_MRAMC_SERVICE)
+    target_compile_definitions(platform_s
+        PUBLIC
+            TFM_NRF_MRAMC_SERVICE
+    )
+endif()
+
 target_compile_options(platform_s
     PUBLIC
         ${COMPILER_CMSE_FLAG}

platform/ext/target/nordic_nrf/common/core/services/include/tfm_ioctl_core_api.h

@@ -31,6 +31,8 @@ enum tfm_platform_ioctl_core_reqest_types_t {
 	TFM_PLATFORM_IOCTL_READ_SERVICE,
 	TFM_PLATFORM_IOCTL_WRITE32_SERVICE,
 	TFM_PLATFORM_IOCTL_GPIO_SERVICE,
+	TFM_PLATFORM_IOCTL_MRAMC_INIT_SERVICE,
+	TFM_PLATFORM_IOCTL_MRAMC_SET_WEN_SERVICE,
 	/* Last core service, start platform specific from this value. */
 	TFM_PLATFORM_IOCTL_CORE_LAST
 };
@@ -89,6 +91,12 @@ struct tfm_gpio_service_out {
 	uint32_t result;
 };
 
+#if defined(CONFIG_TFM_NRF_MRAMC_SERVICE)
+struct tfm_mramc_set_wen_service_args_t {
+	uint32_t write_mode;
+};
+#endif
+
 /**
  * @brief Perform a read operation.
  *
@@ -151,6 +159,25 @@ enum tfm_write32_service_result {
 enum tfm_platform_err_t tfm_platform_gpio_pin_mcu_select(uint32_t pin_number, uint32_t mcu,
 							 uint32_t *result);
 
+#if defined(CONFIG_TFM_NRF_MRAMC_SERVICE)
+/**
+ * @brief Initialise MRAMC peripheral.
+ *
+ * @return On success the processor will initialise MRAMC, in case of error it returns
+ *         values as specified by the \ref tfm_platform_err_t
+ */
+enum tfm_platform_err_t tfm_platform_mramc_init(void);
+
+/**
+ * @brief Setting write permission for MRAMC peripheral.
+ *
+ * @param write_mode    Write mode for MRAMC peripheral.
+ *
+ * @return On success the processor will set MRAMC config write mode, in case of error it returns
+ *         values as specified by the \ref tfm_platform_err_t
+ */
+enum tfm_platform_err_t tfm_platform_mramc_set_wen(uint32_t write_mode);
+#endif /* TFM_NRF_MRAMC_SERVICE */
 
 #ifdef __cplusplus
 }

platform/ext/target/nordic_nrf/common/core/services/include/tfm_platform_hal_ioctl.h

@@ -31,6 +31,12 @@ enum tfm_platform_err_t
 tfm_platform_hal_write32_service(const psa_invec  *in_vec,
 				 const psa_outvec *out_vec);
 
+enum tfm_platform_err_t
+tfm_platform_hal_mramc_init_service(void);
+
+enum tfm_platform_err_t
+tfm_platform_hal_mramc_set_wen_service(const psa_invec *in_vec);
+
 #ifdef __cplusplus
 }
 #endif

platform/ext/target/nordic_nrf/common/core/services/src/tfm_ioctl_core_ns_api.c

@@ -94,3 +94,26 @@ enum tfm_platform_err_t tfm_platform_mem_write32(uint32_t addr, uint32_t value,
 
 	return ret;
 }
+
+#if defined(CONFIG_TFM_NRF_MRAMC_SERVICE)
+enum tfm_platform_err_t tfm_platform_mramc_init(void)
+{
+	return tfm_platform_ioctl(TFM_PLATFORM_IOCTL_MRAMC_INIT_SERVICE, NULL,
+			    NULL);
+}
+
+enum tfm_platform_err_t tfm_platform_mramc_set_wen(uint32_t write_mode)
+{
+	psa_invec in_vec;
+
+	struct tfm_mramc_set_wen_service_args_t args;
+
+	args.write_mode = write_mode;
+
+	in_vec.base = (const void *)&args;
+	in_vec.len = sizeof(struct tfm_mramc_set_wen_service_args_t);
+
+	return tfm_platform_ioctl(TFM_PLATFORM_IOCTL_MRAMC_SET_WEN_SERVICE, &in_vec,
+				NULL);
+}
+#endif

platform/ext/target/nordic_nrf/common/core/services/src/tfm_platform_hal_ioctl.c

@@ -22,6 +22,10 @@
 #include <nrfx_nvmc.h>
 #endif
 
+#if TFM_NRF_MRAMC_SERVICE
+#include <nrfx_mramc.h>
+#endif
+
 #include "handle_attr.h"
 
 enum tfm_platform_err_t
@@ -232,3 +236,39 @@ enum tfm_platform_err_t tfm_platform_hal_write32_service(const psa_invec *in_vec
 
 	return err;
 }
+
+#if TFM_NRF_MRAMC_SERVICE
+enum tfm_platform_err_t tfm_platform_hal_mramc_init_service(void)
+{
+	nrfx_mramc_config_t config = NRFX_MRAMC_DEFAULT_CONFIG();
+	int ret = nrfx_mramc_init(&config, NULL);
+
+	if (ret == -EALREADY) {
+		/* Driver is initialise by ITS or PS at the ealier stage*/
+		return TFM_PLATFORM_ERR_SUCCESS;
+	} else if (ret != 0) {
+		return TFM_PLATFORM_ERR_SYSTEM_ERROR;
+	}
+
+	return TFM_PLATFORM_ERR_SUCCESS;
+}
+
+enum tfm_platform_err_t tfm_platform_hal_mramc_set_wen_service(const psa_invec *in_vec)
+{
+	struct tfm_mramc_set_wen_service_args_t *args;
+
+	if (in_vec->len != sizeof(struct tfm_mramc_set_wen_service_args_t)) {
+		return TFM_PLATFORM_ERR_INVALID_PARAM;
+	}
+
+	args = (struct tfm_mramc_set_wen_service_args_t *)in_vec->base;
+	uint32_t write_mode = args->write_mode;
+
+	while(!nrfx_mramc_ready_check()) {
+	/* Wait until MRAMC is ready for the next operation */
+	}
+	nrfx_mramc_config_write_mode_set(write_mode);
+
+	return TFM_PLATFORM_ERR_SUCCESS;
+}
+#endif /* TFM_NRF_MRAMC_SERVICE */