Cherry-pick nRF9280 PDK board configuration fixes from upstream #3404
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…ronSide LED pins need to be set in the cpuapp/iron rev. 0.2.0 overlay. Signed-off-by: Tommi Kangas <[email protected]> (cherry picked from commit f8f87c0)
…he issue Added a workaround for nRF9280 SoC1.1 data cache related issue. Signed-off-by: Tommi Kangas <[email protected]> (cherry picked from commit c01c4e9)
karstenkoenig
approved these changes
Oct 16, 2025
rlubos
approved these changes
Oct 16, 2025
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LED pins need to be set in the cpuapp/iron rev. 0.2.0 overlay.
Added a workaround for nRF9280 SoC1.1 data cache related issue.