Skip to content

[nrf fromlist] soc: nordic: Prepare GPPI support for nrf92 #3990

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
rlubos merged 3 commits into from
Apr 28, 2026
Merged

[nrf fromlist] soc: nordic: Prepare GPPI support for nrf92 #3990

Show file tree
Hide file tree
Changes from all commits
Commits
Show all changes
3 commits
Select commit Hold shift + click to select a range
43bc064
[nrf fromtree] soc: nordic: gppi: Move to feature specific structure
nordic-krch Apr 16, 2026
236d7c6
[nrf fromtree] soc: nordic: common: gppi: Rework sd2ppi_global setup
nordic-krch Apr 16, 2026
e2ec280
[nrf fromtree] tests: boards: nrf: gppi: Add pdm0 node as test sink
nordic-krch Apr 20, 2026
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
4 changes: 1 addition & 3 deletions modules/hal_nordic/nrfx/CMakeLists.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -139,9 +139,7 @@ zephyr_library_sources_ifdef(CONFIG_HAS_NORDIC_RAM_CTRL ${HELPERS_DIR}/nrf

if(CONFIG_NRFX_GPPI AND NOT CONFIG_NRFX_GPPI_V1)
zephyr_library_sources_ifdef(CONFIG_HAS_HW_NRF_PPI ${HELPERS_DIR}/nrfx_gppi_ppi.c)
if(CONFIG_SOC_SERIES_NRF54H OR CONFIG_SOC_SERIES_NRF54L OR CONFIG_SOC_SERIES_NRF71 OR CONFIG_HAS_HW_NRF_DPPIC)
zephyr_library_sources(${HELPERS_DIR}/nrfx_gppi_dppi.c)
endif()
zephyr_library_sources_ifndef(CONFIG_HAS_HW_NRF_PPI ${HELPERS_DIR}/nrfx_gppi_dppi.c)
if(CONFIG_SOC_COMPATIBLE_NRF54LX OR CONFIG_SOC_SERIES_NRF71)
zephyr_library_sources(${BSP_DIR}/soc/interconnect/nrfx_gppi_d2ppi.c)
endif()
Expand Down
8 changes: 8 additions & 0 deletions modules/hal_nordic/nrfx/Kconfig
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -140,6 +140,14 @@ config NRFX_GPPI_V1
help
When enabled then legacy version of Generic PPI layer is used.

config NRFX_GPPI_SD2PPI_GLOBAL
bool
depends on NRFX_GPPI && !NRFX_GPPI_V1
help
Indicates GPPI implementation for SD^2PPI (Secure multi-Domain DPPI) architecture.
SD^2PPI architecture is using multiple instances of DPPI controllers and Ironside service
to configure the security and ownership of the PPI resources.

config NRFX_GRTC
bool "GRTC driver"
depends on $(dt_nodelabel_exists,grtc)
Expand Down
1 change: 1 addition & 0 deletions soc/nordic/common/CMakeLists.txt
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -38,6 +38,7 @@ endif()

if(CONFIG_NRFX_GPPI AND NOT CONFIG_NRFX_GPPI_V1)
zephyr_library_sources(gppi_init.c)
zephyr_library_sources_ifdef(CONFIG_NRFX_GPPI_SD2PPI_GLOBAL nrfx_gppi_sd2ppi_global.c)
endif()

if(CONFIG_TFM_PARTITION_PLATFORM)
Expand Down
18 changes: 15 additions & 3 deletions soc/nordic/common/gppi_init.c
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -7,8 +7,8 @@
#include <helpers/nrfx_gppi.h>
#if defined(NRFX_GPPI_MULTI_DOMAIN) && !defined(NRFX_GPPI_FIXED_CONNECTIONS)
#include <soc/interconnect/nrfx_gppi_d2ppi.h>
#elif defined(CONFIG_SOC_NRF54H20_CPUAPP)
#include <nrfx_gppi_nrf54h_global.h>
#elif defined(CONFIG_NRFX_GPPI_SD2PPI_GLOBAL)
#include <nrfx_gppi_sd2ppi_global.h>
#elif defined(CONFIG_SOC_NRF54H20_CPURAD)
#include <nrfx_gppi_cpurad.h>
#endif
Expand Down Expand Up @@ -51,7 +51,7 @@ static int gppi_init(void)
NRFX_BIT_MASK(DPPIC20_GROUP_NUM_SIZE) & ~NRFX_DPPI20_GROUPS_USED);
nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC30,
NRFX_BIT_MASK(DPPIC30_GROUP_NUM_SIZE) & ~NRFX_DPPI30_GROUPS_USED);
#elif defined(CONFIG_SOC_NRF54H20_CPUAPP)
#elif defined(CONFIG_NRFX_GPPI_SD2PPI_GLOBAL)
gppi_instance.routes = nrfx_gppi_routes_get();
gppi_instance.route_map = nrfx_gppi_route_map_get();
gppi_instance.nodes = nrfx_gppi_nodes_get();
Expand All @@ -67,10 +67,14 @@ static int gppi_init(void)
BIT_MASK(DT_PROP(DT_NODELABEL(dppic133), channels)));
nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC134,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic134), channels)));
#if DT_NODE_EXISTS(DT_NODELABEL(dppic135))
nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC135,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic135), channels)));
#endif
#if DT_NODE_EXISTS(DT_NODELABEL(dppic136))
nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC136,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic136), channels)));
#endif
nrfx_gppi_channel_init(NRFX_GPPI_NODE_DPPIC120,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic120), channels)));

Expand All @@ -85,10 +89,14 @@ static int gppi_init(void)
BIT_MASK(DT_PROP(DT_NODELABEL(dppic133), groups)));
nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC134,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic134), groups)));
#if DT_NODE_EXISTS(DT_NODELABEL(dppic135))
nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC135,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic135), groups)));
#endif
#if DT_NODE_EXISTS(DT_NODELABEL(dppic136))
nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC136,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic136), groups)));
#endif
nrfx_gppi_groups_init(NRFX_GPPI_NODE_DPPIC120,
BIT_MASK(DT_PROP(DT_NODELABEL(dppic120), groups)));

Expand All @@ -101,10 +109,14 @@ static int gppi_init(void)
BIT_MASK(DT_PROP(DT_NODELABEL(ppib134), channels)));
nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB130_135,
BIT_MASK(DT_PROP(DT_NODELABEL(ppib135), channels)));
#if DT_NODE_EXISTS(DT_NODELABEL(dppic135))
nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB131_136,
BIT_MASK(DT_PROP(DT_NODELABEL(ppib136), channels)));
#endif
#if DT_NODE_EXISTS(DT_NODELABEL(dppic136))
nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB131_137,
BIT_MASK(DT_PROP(DT_NODELABEL(ppib137), channels)));
#endif
nrfx_gppi_channel_init(NRFX_GPPI_NODE_PPIB131_121,
BIT_MASK(DT_PROP(DT_NODELABEL(ppib121), channels)));
#elif defined(CONFIG_SOC_NRF54H20_CPURAD)
Expand Down
Loading
Loading