[nrf fromlist] modules: hal_nordic: ironside: periphconf: Add support…

.github/workflows/backport.yml

@@ -33,6 +33,6 @@ jobs:
       - name: Backport
         uses: zephyrproject-rtos/action-backport@7e74f601d11eaca577742445e87775b5651a965f # v2.0.3-3
         with:
-          github_token: ${{ secrets.GITHUB_TOKEN }}
+          github_token: ${{ secrets.NCS_GITHUB_TOKEN }}
           issue_labels: Backport
           labels_template: '["Backport"]'

.github/workflows/commit-tags.yml

@@ -0,0 +1,31 @@
+name: Commit tags
+
+on:
+  pull_request:
+    types: [synchronize, opened, reopened, edited, labeled, unlabeled,
+            milestoned, demilestoned, assigned, unassigned, ready_for_review,
+            review_requested]
+
+permissions:
+  contents: read
+
+jobs:
+  commit_tags:
+    runs-on: ubuntu-22.04
+    name: Run commit tags checks on patch series (PR)
+    steps:
+    - name: Update PATH for west
+      run: |
+        echo "$HOME/.local/bin" >> $GITHUB_PATH
+
+    - name: Checkout the code
+      uses: actions/checkout@08c6903cd8c0fde910a37f88322edcfb5dd907a8 # v5.0.0
+      with:
+        ref: ${{ github.event.pull_request.head.sha }}
+        fetch-depth: 0
+
+    - name: Run the commit tags
+      uses: nrfconnect/action-commit-tags@main
+      with:
+        target: .
+        upstream: zephyrproject-rtos/zephyr/main

.github/workflows/compliance.yml

@@ -34,8 +34,8 @@ jobs:
         git config --global user.name "Your Name"
         git remote -v
         # Ensure there's no merge commits in the PR
-        [[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \
-        (echo "::error ::Merge commits not allowed, rebase instead";false)
+        #[[ "$(git rev-list --merges --count origin/${BASE_REF}..)" == "0" ]] || \
+        #(echo "::error ::Merge commits not allowed, rebase instead";false)
         rm -fr ".git/rebase-apply"
         rm -fr ".git/rebase-merge"
         git rebase origin/${BASE_REF}
@@ -83,12 +83,9 @@ jobs:
         git log  --pretty=oneline | head -n 10
         # Increase rename limit to allow for large PRs
         git config diff.renameLimit 10000
-        excludes="-e KconfigBasic -e SysbuildKconfigBasic -e ClangFormat"
-        # The signed-off-by check for dependabot should be skipped
-        if [ "${{ github.actor }}" == "dependabot[bot]" ]; then
-          excludes="$excludes -e Identity"
-        fi
-        ./scripts/ci/check_compliance.py --annotate $excludes -c origin/${BASE_REF}..
+        ./scripts/ci/check_compliance.py --annotate -e KconfigBasic -e SysbuildKconfigBasic \
+        -e Kconfig -e SysbuildKconfig -e KconfigBasicNoModules -e SysbuildKconfigBasicNoModules \
+        -e ModulesMaintainers -c origin/${BASE_REF}..
 
     - name: upload-results
       uses: actions/upload-artifact@b7c566a772e6b6bfb58ed0dc250532a479d7789f # v6.0.0

.github/workflows/manifest-PR.yml

@@ -0,0 +1,39 @@
+name: handle manifest PR
+on:
+  pull_request_target:
+    types: [opened, synchronize, closed, reopened]
+    branches:
+      - main
+      - ncs-v*-branch
+
+permissions:
+  contents: read
+
+jobs:
+  call-manifest-pr-action:
+    runs-on: ubuntu-latest
+    outputs:
+      base-branch: ${{ steps.set-base-branch.outputs.base_branch }}
+    steps:
+      #      Determine the base branch:
+      #        * sdk-zephyr/main -> sdk-nrf/main
+      #        * sdk-zephyr/ncs-vX.Y-branch -> sdk-nrf/vX.Y-branch
+      - name: Set base branch
+        id: set-base-branch
+        run: |
+          if [[ "${{ github.event.pull_request.base.ref }}" == "main" ]]; then
+            echo "base_branch=main" >> "$GITHUB_OUTPUT"
+          elif [[ "${{ github.event.pull_request.base.ref }}" =~ ^ncs-(v[0-9]+\.[0-9]+-branch)$ ]]; then
+            branch_name="${{ github.event.pull_request.base.ref }}"
+            branch_name="${branch_name#ncs-}"
+            echo "base_branch=${branch_name}" >> "$GITHUB_OUTPUT"
+          else
+            echo "Error: Unsupported base branch: ${{ github.event.pull_request.base.ref }}" >&2
+            exit 1
+          fi
+      - name: handle manifest PR
+        uses: nrfconnect/action-manifest-pr@main
+        with:
+          token: ${{ secrets.NCS_GITHUB_TOKEN }}
+          manifest-pr-title-details: ${{ github.event.pull_request.title }}
+          base-branch: ${{ steps.set-base-branch.outputs.base_branch }}

.github/workflows/stale_issue.yml

@@ -10,7 +10,7 @@ jobs:
   stale:
     name: Find Stale issues and PRs
     runs-on: ubuntu-24.04
-    if: github.repository == 'zephyrproject-rtos/zephyr'
+    if: github.repository == 'nrfconnect/sdk-zephyr'
     permissions:
       pull-requests: write # to comment on stale pull requests
       issues: write        # to comment on stale issues

CMakeLists.txt

@@ -1880,12 +1880,27 @@ if(CONFIG_BUILD_OUTPUT_BIN AND CONFIG_BUILD_OUTPUT_UF2)
   # are typically loaded to RAM
   if(NOT CONFIG_XIP)
     if(CONFIG_BUILD_OUTPUT_ADJUST_LMA)
-      math(EXPR code_address
+      if(CONFIG_SRAM_DEPRECATED_KCONFIG_SET)
+        math(EXPR code_address
           "${CONFIG_SRAM_BASE_ADDRESS} + ${CONFIG_BUILD_OUTPUT_ADJUST_LMA} + 0"
           OUTPUT_FORMAT HEXADECIMAL
-      )
+        )
+      else()
+        dt_chosen(chosen_sram_path PROPERTY "zephyr,sram")
+        dt_reg_addr(ram_addr PATH "${chosen_sram_path}")
+
+        math(EXPR code_address
+          "${ram_addr} + ${CONFIG_BUILD_OUTPUT_ADJUST_LMA} + 0"
+          OUTPUT_FORMAT HEXADECIMAL
+        )
+      endif()
     else()
-      set(code_address "${CONFIG_SRAM_BASE_ADDRESS}")
+      if(CONFIG_SRAM_DEPRECATED_KCONFIG_SET)
+        set(code_address ${CONFIG_SRAM_BASE_ADDRESS})
+      else()
+        dt_chosen(chosen_sram_path PROPERTY "zephyr,sram")
+        dt_reg_addr(code_address PATH "${chosen_sram_path}")
+      endif()
     endif()
   endif()
 

Jenkinsfile

@@ -0,0 +1,5 @@
+@Library("CI_LIB") _
+
+def pipeline = new ncs.sdk_zephyr.Main()
+
+pipeline.run(JOB_NAME)

MAINTAINERS.yml

@@ -1286,7 +1286,6 @@ Documentation:
     - doc/index-tex.rst
     - doc/index.html
     - doc/index.rst
-    - doc/kconfig.rst
     - doc/templates/sample.tmpl
     - doc/templates/board.tmpl
     - boards/index.rst

arch/Kconfig

@@ -223,24 +223,37 @@ config 64BIT
 	  soc/**/Kconfig, or boards/**/Kconfig and the user should generally
 	  avoid modifying it.
 
+config SRAM_DEPRECATED_KCONFIG_SET
+	bool
+	default y if SRAM_SIZE != $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM),0,K)
+	default y if SRAM_BASE_ADDRESS != $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM))
+	default n
+	select DEPRECATED
+	help
+	  Indicates that either `CONFIG_SRAM_SIZE` or `CONFIG_SRAM_BASE_ADDRESS` have been
+	  manually set, these Kconfigs are now deprecated and should be replaced by referencing
+	  the devicetree `zephyr,sram` chosen node instead.
+
 # Workaround for not being able to have commas in macro arguments
 DT_CHOSEN_Z_SRAM := zephyr,sram
 
 config SRAM_SIZE
-	int "SRAM Size in kB"
+	int "SRAM Size in kB [DEPRECATED]"
 	default $(dt_chosen_reg_size_int,$(DT_CHOSEN_Z_SRAM),0,K)
 	help
 	  The SRAM size in kB. The default value comes from /chosen/zephyr,sram in
 	  devicetree. The user should generally avoid changing it via menuconfig or
-	  in configuration files.
+	  in configuration files. This option is now deprecated and must be replaced by referencing
+	  the devicetree `zephyr,sram` chosen node instead.
 
 config SRAM_BASE_ADDRESS
-	hex "SRAM Base Address"
+	hex "SRAM Base Address [DEPRECATED]"
 	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_SRAM))
 	help
 	  The SRAM base address. The default value comes from
 	  /chosen/zephyr,sram in devicetree. The user should generally avoid
-	  changing it via menuconfig or in configuration files.
+	  changing it via menuconfig or in configuration files. This option is now deprecated and
+	  must be replaced by referencing the devicetree `zephyr,sram` chosen node instead.
 
 config XIP
 	bool "Execute in place"
@@ -599,9 +612,36 @@ config GEN_SW_ISR_TABLE
 	depends on GEN_ISR_TABLES
 	help
 	  This option controls whether a platform using gen_isr_tables
-	  needs a software ISR table table created. This is an array of struct
-	  _isr_table_entry containing the interrupt service routine and supplied
-	  parameter.
+	  needs a software ISR table created.
+	  It can be generated as either an array or a switch-case.
+	  See CONFIG_GEN_SW_ISR_TABLE_TYPE.
+
+choice GEN_SW_ISR_TABLE_TYPE
+	prompt "Allows to chose how ISR table is implemented"
+	depends on GEN_SW_ISR_TABLE
+	default GEN_SW_ISR_TABLE_ARRAY
+	help
+	  CONFIG_GEN_SW_ISR_TABLE_ARRAY is a default option.
+	  It should be used when in doubt.
+	  GEN_SW_ISR_TABLE_SWITCH allows for binary size optimization
+	  in certain scenarios, but may also increase latency, to execution of ISR with higher number, if there is significant number of ISR assigned in your system.
+
+config GEN_SW_ISR_TABLE_ARRAY
+	bool "Generate an array of ISR entries"
+	help
+	  This is an array of struct _isr_table_entry containing
+	  the interrupt service routine and supplied parameter.
+	  All interrupts have their own entry.
+
+config GEN_SW_ISR_TABLE_SWITCH
+	bool "Generate a function with a switch-case"
+	help
+	  Use a switch-case instead of an array.
+	  This helps to limit binary size when most of the IRQs are not used.
+	  In such case common, duplicated entries are grouped in a single default block
+	  while few used interrupts have their own case blocks.
+
+endchoice
 
 config ARCH_SW_ISR_TABLE_ALIGN
 	int "Alignment size of a software ISR table"

arch/arm/core/cortex_a_r/reboot.c

@@ -44,7 +44,7 @@ TOOLCHAIN_DISABLE_WARNING(TOOLCHAIN_WARNING_NONNULL)
 void __weak relocate_vector_table(void)
 {
 #if defined(CONFIG_XIP) && (CONFIG_FLASH_BASE_ADDRESS != 0) ||                                     \
-	!defined(CONFIG_XIP) && (CONFIG_SRAM_BASE_ADDRESS != 0)
+	!defined(CONFIG_XIP) && (DT_CHOSEN_SRAM_ADDR != 0)
 	write_sctlr(read_sctlr() & ~HIVECS);
 	size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
 	(void)arch_early_memcpy(VECTOR_ADDRESS, _vector_start, vector_size);

arch/arm/core/cortex_m/isr_wrapper.c

@@ -76,8 +76,15 @@ void _isr_wrapper(void)
 	 */
 	irq_number -= 16;
 
+#if defined(CONFIG_GEN_SW_ISR_TABLE_ARRAY)
 	const struct _isr_table_entry *entry = &_sw_isr_table[irq_number];
 	(entry->isr)(entry->arg);
+#elif defined(CONFIG_GEN_SW_ISR_TABLE_SWITCH)
+	struct _isr_table_entry entry;
+
+	get_isr_entry(irq_number, &entry);
+	(entry.isr)(entry.arg);
+#endif /* CONFIG_GEN_SW_ISR_TABLE_ARRAY */
 
 #if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
 	z_soc_irq_eoi(irq_number);

arch/arm/core/cortex_m/prep_c.c

@@ -74,7 +74,7 @@ void __weak relocate_vector_table(void)
 void __weak relocate_vector_table(void)
 {
 #if defined(CONFIG_XIP) && (CONFIG_FLASH_BASE_ADDRESS != 0) ||                                     \
-	!defined(CONFIG_XIP) && (CONFIG_SRAM_BASE_ADDRESS != 0)
+	!defined(CONFIG_XIP) && (DT_CHOSEN_SRAM_ADDR != 0)
 	size_t vector_size = (size_t)_vector_end - (size_t)_vector_start;
 	(void)memcpy(VECTOR_ADDRESS, _vector_start, vector_size);
 #elif defined(CONFIG_SW_VECTOR_RELAY) || defined(CONFIG_SW_VECTOR_RELAY_CLIENT)

arch/arm/core/mpu/arm_mpu_regions.c

@@ -8,6 +8,9 @@
 #include <zephyr/arch/arm/mpu/arm_mpu.h>
 
 #include <zephyr/arch/arm/mpu/arm_mpu_mem_cfg.h>
+#if USE_PARTITION_MANAGER
+#include <pm_config.h>
+#endif
 
 #ifdef CONFIG_ARM_MPU_SRAM_WRITE_THROUGH
 #define ARM_MPU_SRAM_REGION_ATTR  REGION_RAM_WT_ATTR
@@ -30,13 +33,23 @@ static const struct arm_mpu_region mpu_regions[] = {
 
 	/* Region 1 */
 	MPU_REGION_ENTRY("SRAM_0",
-			 CONFIG_SRAM_BASE_ADDRESS,
+#if USE_PARTITION_MANAGER
+			 PM_SRAM_ADDRESS,
+#if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
+			 REGION_RAM_ATTR(PM_SRAM_ADDRESS, PM_SRAM_SIZE)),
+#else
+			 REGION_RAM_ATTR(REGION_SRAM_SIZE)),
+#endif
+#else
+			 DT_CHOSEN_SRAM_ADDR,
 #if defined(CONFIG_ARMV8_M_BASELINE) || defined(CONFIG_ARMV8_M_MAINLINE)
-			 ARM_MPU_SRAM_REGION_ATTR(CONFIG_SRAM_BASE_ADDRESS,
-				 CONFIG_SRAM_SIZE * 1024)),
+			 ARM_MPU_SRAM_REGION_ATTR(DT_CHOSEN_SRAM_ADDR,
+				 DT_CHOSEN_SRAM_SIZE)),
 #else
 			 ARM_MPU_SRAM_REGION_ATTR(REGION_SRAM_SIZE)),
 #endif
+
+#endif /* USE_PARTITION_MANAGER */
 };
 
 const struct arm_mpu_config mpu_config = {

arch/arm64/core/CMakeLists.txt

@@ -22,7 +22,13 @@ zephyr_library_sources(
 # simple numeric comparison because these values may be
 # beyond the numeric range of integers for cmake.
 
-string(LENGTH "x${CONFIG_SRAM_BASE_ADDRESS}" SRAM_LENGTH)
+if(CONFIG_SRAM_DEPRECATED_KCONFIG_SET)
+  string(LENGTH "x${CONFIG_SRAM_BASE_ADDRESS}" SRAM_LENGTH)
+else()
+  dt_chosen(chosen_sram_path PROPERTY "zephyr,sram")
+  dt_reg_addr(ram_addr PATH "${chosen_sram_path}")
+  string(LENGTH "x${ram_addr}" SRAM_LENGTH)
+endif()
 string(LENGTH "x${CONFIG_KERNEL_VM_BASE}" KERNEL_VM_LENGTH)
 
 if(${SRAM_LENGTH} GREATER 11 OR ${KERNEL_VM_LENGTH} GREATER 11)

arch/arm64/core/Kconfig

@@ -382,7 +382,7 @@ config ARM64_PA_BITS
 config MAX_XLAT_TABLES
 	int "Maximum numbers of translation tables"
 	default 32 if USERSPACE && TEST && SMP
-	default 24 if USERSPACE && TEST
+	default 28 if USERSPACE && TEST
 	default 20 if USERSPACE && (ARM64_VA_BITS >= 40)
 	default 16 if USERSPACE
 	default 12 if (ARM64_VA_BITS >= 40)

arch/common/isr_tables.c

@@ -87,15 +87,20 @@ const uintptr_t __irq_vector_table _irq_vector_table[IRQ_TABLE_SIZE] = {
 /* If there are no interrupts at all, or all interrupts are of the 'direct'
  * type and bypass the _sw_isr_table, then do not generate one.
  */
-#ifdef CONFIG_GEN_SW_ISR_TABLE
+#if defined(CONFIG_GEN_SW_ISR_TABLE_ARRAY)
 #ifndef CONFIG_DYNAMIC_INTERRUPTS
 const
-#endif
-struct _isr_table_entry __sw_isr_table _sw_isr_table[IRQ_TABLE_SIZE] = {
-	[0 ...(IRQ_TABLE_SIZE - 1)] = {(const void *)0x42,
-				       &z_irq_spurious},
+#endif /* CONFIG_DYNAMIC_INTERRUPTS */
+	struct _isr_table_entry __sw_isr_table _sw_isr_table[IRQ_TABLE_SIZE] = {
+		[0 ...(IRQ_TABLE_SIZE - 1)] = {(const void *)0x42, &z_irq_spurious},
 };
-#endif
+#elif defined(CONFIG_GEN_SW_ISR_TABLE_SWITCH)
+void __sw_isr_table get_isr_entry(int irq_number, struct _isr_table_entry *entry)
+{
+	entry->arg = (const void *)0x0;
+	entry->isr = z_irq_spurious;
+}
+#endif /* CONFIG_GEN_SW_ISR_TABLE_ARRAY */
 
 #ifdef CONFIG_SHARED_INTERRUPTS
 #ifndef CONFIG_DYNAMIC_INTERRUPTS

arch/riscv/Kconfig

@@ -67,10 +67,13 @@ config RISCV_ALWAYS_SWITCH_THROUGH_ECALL
 	  and most people should say n here to minimize context switching
 	  overhead.
 
+DT_CHOSEN_Z_SRAM = zephyr,sram
+
 choice RISCV_CMODEL
 	prompt "RISC-V Code Model"
-	default RISCV_CMODEL_LARGE if (SRAM_BASE_ADDRESS > 0xffffffff) || \
-				      (KERNEL_VM_BASE > 0xffffffff)
+	default RISCV_CMODEL_LARGE if (SRAM_DEPRECATED_KCONFIG_SET && SRAM_BASE_ADDRESS > 0xffffffff) || \
+		(!SRAM_DEPRECATED_KCONFIG_SET && $(dt_chosen_reg_addr_int,$(DT_CHOSEN_Z_SRAM),0) > 0xffffffff) || \
+		(KERNEL_VM_BASE > 0xffffffff)
 	default RISCV_CMODEL_MEDANY if 64BIT
 	default RISCV_CMODEL_MEDLOW
 

arch/x86/Kconfig

@@ -356,9 +356,12 @@ config X86_MAX_ADDITIONAL_MEM_DOMAINS
 
 	  Zephyr test cases assume 3 additional domains can be instantiated.
 
+DT_CHOSEN_Z_SRAM = zephyr,sram
+
 config X86_EXTRA_PAGE_TABLE_PAGES
 	int "Reserve extra pages in page table"
-	default 1 if X86_PAE && (KERNEL_VM_BASE != SRAM_BASE_ADDRESS)
+	default 1 if X86_PAE && ((SRAM_DEPRECATED_KCONFIG_SET && KERNEL_VM_BASE != SRAM_BASE_ADDRESS) || \
+		(!SRAM_DEPRECATED_KCONFIG_SET && KERNEL_VM_BASE != $(dt_chosen_reg_addr_int,$(DT_CHOSEN_Z_SRAM),0)))
 	default 0
 	depends on X86_MMU
 	help